Low‐Power Nonvolatile Charge Storage Memory Based on MoS₂ and an Ultrathin Polymer Tunneling Dielectric

Abstract

Low-power, nonvolatile memory is an essential electronic component to store and process the unprecedented data flood arising from the oncoming Internet of Things era. Molybdenum disulfide (MoS 2 ) is a 2D material that is increasingly regarded as a promising semiconductor material in electronic device applications because of its unique physical characteristics. However, dielectric formation of an ultrathin low-k tunneling on the dangling bond-free surface of MoS 2 is a challenging task. Here, MoS 2 -based low-power nonvolatile charge storage memory devices are reported with a poly(1,3,5-trimethyl-1,3,5-trivinyl cyclotrisiloxane) (pV3D3) tunneling dielectric layer formed via a solvent-free initiated chemical vapor deposition (iCVD) process. The surface-growing polymerization and low-temperature nature of the iCVD process enable the conformal growing of low-k (≈2.2) pV3D3 insulating films on MoS 2 . The fabricated memory devices exhibit a tunable memory window with high on/off ratio (≈10 6 ), excellent retention times of 10 5 s with an extrapolated time of possibly years, and an excellent cycling endurance of more than 10 3 cycles, which are much higher than those reported previously for MoS 2based memory devices. By leveraging the inherent flexibility of both MoS 2 and polymer dielectric films, this research presents an important milestone in the development of low-power flexible nonvolatile memory devices.

A generic method to control hysteresis and memory effect in Van der Waals hybrids

“…We find a very low cycle to cycle variability in the memory ratio, defined as the ratio of the on and off state current, demonstrating the reliability of these non-volatile memory devices (inset of figure 3(d)). Furthermore, the memory ratio in our devices, which can be as high as 10 8 , is comparable to state of the art sensors fabricated with two-dimensional materials, that have reported in literature (Supplementary section C.2) [52][53][54][55][56][57][58][59]. Additionally, the low bias requirements and program state current value makes the device power efficient with an observed power dissipation of ≈10pW in the program state in our MoS 2 based memory devices [51].…”

Nonvolatile Memories Based on Graphene and Related 2D Materials

“…The group of S.‐Y. Choi developed a low‐power flash‐memory cell consisting of a few‐layer MoS 2 channel, a polymer tunneling layer, namely a ≈10 nm thick film of poly(1,3,5‐trimethyl‐1,3,5‐trivinyl cyclotrisiloxane) (pV3D3) formed via a solvent‐free initiated chemical vapor deposition (iCVD) process, as well as an Al 2 O 3 blocking oxide (≈20 nm) deposited by ALD onto a Au‐nanoparticle charge‐storage layer (≈4 nm). The memory cells displayed promising characteristics, namely endurance >10 3 cycles, state‐of‐the‐art retention time (>10 years) and high switching ratio ( I on / I off ≈ 10 6 ), being the highest obtained so far in GRM‐based flash devices (see Table ).…”

MoS2 Memtransistors Fabricated by Localized Helium Ion Beam Irradiation

“…Due to enhanced electrostatic control and inter-layer van der Waals bonding, these materials could offer high-performing, flexible and transparent alternatives to silicon-based memory components [2][3][4][5][6][7][8][9]. On-chip MoS 2 -based vertical memory cells [10][11][12][13][14][15][16][17][18] and printed lateral devices with synaptic functionalities [19] have been prototyped in recent years.…”