Low Power Oriented Test Modification and Compression Techniques for Scan Based Core Testing

Abstract

This paper proposes effective techniques for reducing not only test data volume but also scan-in transitions that are closely related to power dissipation. First, we adopt a new test smoothing algorithm that can reduce scan-in transitions through test vector modification. Second, we propose a test compression method that can reduce test data volume while keeping down the increase of transitions as small as possible. The effectiveness of the proposed techniques is shown through experiments for ISCAS'89 benchmark circuits.