Low-power resistive switching in Au/NiO/Au nanowire arrays

Abstract

Arrays of vertical nanowires structured in Au/NiO/Au segments with 50 nm diameter are characterized by conductive atomic force microscopy to investigate unipolar resistive switching in NiO at the nanoscale. The switching cycles are characterized by extremely low power consumption down to 1.3 nW, which constitutes a significant improvement in nanowire-based resistive switching memory devices. The trend of the reset current as a function of the set resistance, typical of unipolar memories, is extended to a much wider current range than what is reported in literature, confirming the role of Joule heating in the reset process for very low reset currents

Recent Developments and Perspectives for Memristive Devices Based on Metal Oxide Nanowires

“…Kim et al [38] showed that the resistive switching mechanism investigated in single NiO NW can be exploited to realize NW array-based resistive switching devices that consisted in hundreds of vertically aligned NWs embedded in the AAO membrane and connected in parallel in between an Au bottom electrode and a tungsten probe that acted as the top electrode. In a NW array, each vertically aligned NW can be considered a resistive switching device, as shown by Brivio et al [240,241] in case of Au/NiO/Au and Au/NiO x /Ni/Au heterostructured NWs. In order to investigate the switching mechanism in NiO NW arrays, Huang et al [215] reported a semiconductor type of carrier transport in the ON state, characterized by a resistance increasing with decreasing temperature.…”

“…The existence of multistate in NiO/Pt NW arrays was explained in terms of a binary resistor model, as schematized in Figure 16b, and is strictly connected to the structure of the NW that is composed of a large number of NiO segments comprised in between Pt segments. [240] Copyright 2012, American Institute of Physics. Electron.…”

“…For this reason, the conduction mechanism in LRS was attributed to hopping through percolation paths formed by oxygen related defects in the highly defective polycrystalline NiO structure. In a NW array, each vertically aligned NW can be considered a resistive switching device, as shown by Brivio et al in case of Au/NiO/Au and Au/NiO x /Ni/Au heterostructured NWs. By using a C‐AFM to combine surface morphology and current maps, authors showed that it is possible to switch a single selected NW in the array.…”

“…The map color is related to the current map; c) forming process of a selected NW; d) AFM image after the forming process, evidencing a high current spot on the selected NW after the forming process. Adapted with permission . Copyright 2012, American Institute of Physics.…”

Stochastic circuit breaker network model for bipolar resistance switching memories

“…[17] As a matter of fact, the variability of RRAM switching is intrinsic to its operation principle: indeed, the most mature class of RRAM devices is the one that bases its operation on the inherent stochastic processes of formation and disruption of nanometric filamentary regions where metallic ions or defects, which locally reduce the stoichiometry of the insulating layer, activate the electric conduction from one electrode to the opposite. [18][19][20][21][22][23] As the filament dimensions shrinks, according to both device and power scaling requirements, [24,25] variability raises as a consequence. For this reason, applications basing their functionality on device variability are becoming more and more appealing for future high performance and low power computation schemes [14,26] and compact models capturing the operation variability of RRAM devices are gaining importance.…”