Low Power Spin-Transfer Magnetoresistive Random Access Memory Writing Scheme with Selective Word Line Bootstrap

Abstract

We describe a new writing scheme with a selective word line bootstrap for spin-transfer magnetoresistive random access memory (MRAM). Applying spin-transfer switching to MRAM, its writing power consumption decreases and its memory cell area is also reduced. However, during write operation, the required bit line cramp voltage for stored data switching depends on the value of stored data, magnetic tunnel junction (MTJ) characteristics, and switching current direction. Therefore, the bit line voltage must be optimized to minimize the power consumption. With the proposed scheme, word line voltage is varied according to the value of writing data in order to decrease the threshold bit line voltage. Furthermore, the spin-transfer MRAM resistance model with reading and writing operations was successfully implemented for the circuit simulation. From the simulation results, it was found that writing threshold bit line bias during writing operation can decrease from 17 to 28% with the proposed selective bootstrap. Also, more than 25% of the cell transistor gate width can be decreased. This result shows that the proposed writing scheme is effective in reducing power consumption, and can also reduce the MRAM cell area.