Low voltage CMOS power amplifier with integrated analog pre-distorter for BLE 4.0 application

Abstract

<span>In this paper, a low power consumption linear power amplifier (PA) for Bluetooth Low Energy (BLE) application is presented. An analogue pre-distorter (APD) is integrated to the PA. The APD consist of an active inductor, driver amplifier, and a RC phase linearizer. The PA delivers more than 12dB power gain from 2.4GHz to 2.5GHz. At the center frequency of 2.45GHz, the gain of the PA is 13dB with PAE of 26.7% and maximum output power of 14dBm. The corresponding OIP3 is 27.6dBm. The supply voltage headroom of this PA is 1.8V. The propose APD serves to be a solution to improve the linearity of the PA with minimum trade-off to the power consumption.</span>

Comparative Analysis of Design Parameters for Modern Radio Frequency Complementary Metal Oxide Semiconductor Ultra-Low Power Amplifier Architecture Trends

“…The analysis was performed with reference to the input power (in dBm). Concerning BLE RF PAs, Integrated Analogue Pre-Distorters (APDs) [4] and class-F designs with reconfigurable off-chip inter-stage matching networks [10] have a low PAE compared to class-E [3] and class-D [6] design architectures.…”

“…Taking into account the WPAN BLE standards, Integrated Analogue Pre-Distorters (APDs) [4] and class-F designs with reconfigurable off-chip inter-stage matching network architectures [5] produce more output power because of the BLE class-1 ISM band. The least output power is produced by the CMOS power amplifier based on transformer coupling and synthetic dielectric differential transmission.…”

A 3.3V, 24dBm CHT Integrated CMOS 180nm Power Amplifier for NB-IoT Application

“…The power amplifier (PA) should be effective in terms of efficiency and linearity across the required power level in order to provide an efficient and reliable data exchange between the RF receiver and transmitter in the transceiver system. CMOS PAs have been extensively studied to fulfill and satisfy low cost specifications for miniature range transceivers [3] [4]. Due to the strict protocol requirements and the massive trade-off between efficiency and linearity in the CMOS process, the design of CMOS-based PAs has become arduous and challenging compared to low-trade GaAs-based Pas [5].…”

A State-of-the-Art Review on CMOS Radio Frequency Power Amplifiers for Wireless Communication Systems

“…To address this limitation, there was a recent focus on researching CMOS-based RF integrated circuits (RFICs) for wireless mobile applications [ 3 , 4 , 5 , 6 , 7 , 8 , 9 , 10 ]. However, CMOS-based PAs have several disadvantages due to their lower breakdown voltage, their higher substrate loss, and the unavailability of back via holes for the ground connection, which limit the achievable output power and efficiency compared to their III-V counterparts [ 11 , 12 , 13 ]. Despite their disadvantages, CMOS-based PAs offer a promising alternative due to their cost-effectiveness and potential for integration with other circuits.…”