2020
DOI: 10.1007/s11227-020-03420-w
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Lower bounds for dilation, wirelength, and edge congestion of embedding graphs into hypercubes

Abstract: Interconnection networks provide an effective mechanism for exchanging data between processors in a parallel computing system. One of the most efficient interconnection networks is the hypercube due to its structural regularity, potential for parallel computation of various algorithms, and the high degree of fault tolerance. Thus it becomes the first choice of topological structure of parallel processing and computing systems. In this paper, lower bounds for the dilation, wirelength, and edge congestion of an … Show more

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Cited by 11 publications
(2 citation statements)
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“…These guest and host graphs usually are interconnection networks which enables task distribution, architectural modeling, and algorithm migration 1 . In recent decades, embedding has been investigated for different significant and architecturally vital interconnection networks 2–7 . Hypercubes and hypercube variants have attracted the most recognition and have been investigated extensively regarding embedding 2,8–14 .…”
Section: Introductionmentioning
confidence: 99%
See 1 more Smart Citation
“…These guest and host graphs usually are interconnection networks which enables task distribution, architectural modeling, and algorithm migration 1 . In recent decades, embedding has been investigated for different significant and architecturally vital interconnection networks 2–7 . Hypercubes and hypercube variants have attracted the most recognition and have been investigated extensively regarding embedding 2,8–14 .…”
Section: Introductionmentioning
confidence: 99%
“…Until then only approximations were given in the form of bounds 10,15,17 . Here are few works which are concerned about optimizing the layout for the considered embedding: complete Josephus cube into tree related architectures, 8 balanced complete multipartite graphs onto cartesian product between {Path, Cycle} and trees, 18 balanced complete multipartite graphs onto grids and tree related structures, 19 spined cube into grid, 20 complete bipartite graph into sibling tree, 21 augmented cube into tree related and windmill structures, 9 fault tolerance mapping of ternary N$$ N $$‐cube onto chips, 4 hierarchical cube into linear array and k$$ k $$‐rooted complete binary trees, 5 hierarchical folded cubes into linear arrays and complete binary trees, 1 circular layout of hypercube, 12 hypercube into certain trees, 6 locally twisted cube into grid, 13 familiar graphs onto hypercube, 7 hypercube into cylinder, 14 and 3‐Ary n$$ n $$‐cube into grid 22 …”
Section: Introductionmentioning
confidence: 99%