¹K.S. Neelukumari and ²Dr. K.B. Jayanthi

Abstract

Power dissipation is a significant problem as complexity of the circuit increases, which also increases during testing the VLSI circuits. So test data volume and test application time are major concerns for large industrial circuits. Test set selection is necessary to ensure that the most effective patterns are chosen from large test set in a high volume testing environment. LFSR reseeding forms the basis for many test compression solution, which increase the encoding efficiency of test compression based on LFSR. The most important criteria is to optimize the patterns generated for Built In Self-Test (BIST) which maximize the fault coverage and reduce the number of transition in the scan chains. Efficient techniques for test generations are essential in order to reduce the test generation time and size. In this study the output deviation method is used to select the effective test pattern from a large n-detect test set for test data compression scheme. The experiments are performed on ISCAS '85 benchmark circuits.