<title>Architecture and performance of a hardware collision-checking accelerator</title>

Abstract

As is well known, collision checking in a generalized sense is a substantial contributor to processor load in a wide range of path-planning applications. These include high-speed terrain following and obstacle avoidance in low-flying aircraft, path planning on local scales for autonomous vehicles, both undersea and on land, and a number of areas in robotic motion planning, not only for mobile robot navigation but also for such problems as arm motion in cluttered environments. Some algorithms have been quoted1 as requiring from 80% to as much as 95% of the available path-planning time for collision checking. Under such conditions, special-purpose hardware designed for the requirements of collision checking offers the promise of major overall performance improvements in real-time path planning. Recent work at the Lockheed Palo Alto Research Laboratories has produced a hardware system providing a major acceleration in collision-checking capability with minimal added hardware, and demonstrated an approach leading to still further major increments in speed for this function2'3. This paper first describes the architecture of the system, which is known as TIGER (Three-dimensional Intersect & Geometrical Evaluator in Real time). This is followed by an analysis of the computational load of the collisionchecking problem and a discussion of important design and performance considerations arising from the approach both within TIGER itself and in the integration of TIGER into a higher-level path-planning system.The TIGER System Architecture The overall TIGER system architecture is shown in Figure 1 . The TIGER Accelerator itself consists of two major sections. The first is the TIGER Parallel Classifier, which accepts path segment descriptors and generates very fast classifications in parallel against a stored block of object descriptors; objects here are represented as cuboids4 rectangular solids described by the coordinates of a pair of opposite corners. Based on a set of geometric criteria2, each path segment in turn is classified against each object as hit, miss, or ambiguous. The Host-level path planner may immediately be informed of the results in the first two cases, but the last case requires further testing, which is carried out in the TIGER Resolver. The Resolver uses additional geometrical classification information from the Classifier to control numerical resolution of the ambiguity. The result is then passed on to the Host. Since there is a very high volume of data traffic into and out of the TIGER itself, in practically all systems it will be advisable to isolate the TIGER from the Host bus and to provide local control and memory in the form of an Interface and Support Processor (or Processors), wherein most of the currently-active portion of the path-planner's environment model will reside, and where lists of path segments for checking may be buffered and manipulated as requested by the Host. Depending on tradeoffs in available processing power, the Support Processor may also aid in any necessary conversion of o...