1995
DOI: 10.1117/12.224199
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<title>PC/ATM interface accelerator using reconfigurable technology</title>

Abstract: Current high-speed communication networks exhibit gigabit bandwidths. Nevertheless, applications cannot take advantage of these advances due to host interface and machine and system architecture limitations. Today, the main concern is to reduce the protocol overheads imposed on data transfers, minimizing memory copies and implementing off-host communication functions.We propose a novel architecture for real-time distributed systems using a 155Mbit/s ATM network. The system is based on an intelligent communicat… Show more

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“…McHenry et al [22] have proposed an FPGA-based front-end processor that filters information to an ATM firewall host to ensure network security. Guillaud et al [23] have proposed a communication interface board for PCs which incorporates a transputer, an FPGA, and a VRAM to implement reconfigurable high level communication services for distributed real-time data and multimedia communication. None of these approaches, however, have considered configurable network interfaces with parallel computing applications in mind.…”
Section: Related Work and Discussionmentioning
confidence: 99%
“…McHenry et al [22] have proposed an FPGA-based front-end processor that filters information to an ATM firewall host to ensure network security. Guillaud et al [23] have proposed a communication interface board for PCs which incorporates a transputer, an FPGA, and a VRAM to implement reconfigurable high level communication services for distributed real-time data and multimedia communication. None of these approaches, however, have considered configurable network interfaces with parallel computing applications in mind.…”
Section: Related Work and Discussionmentioning
confidence: 99%