Macro-Modeling for N-Type Feedback Field-Effect Transistor for Circuit Simulation

Oh, Jong Hyeok; Yu, Yun Seop

doi:10.3390/mi12101174

Cited by 2 publications

(1 citation statement)

References 28 publications

(38 reference statements)

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“…Semiconductor device models are regarded as a bridge between foundry, EDA vendor, and design house, as well as a key-enabler for accurate integrated circuit (IC) simulations. The conventional semiconductor device models include macro models [13,14], compact models [15][16][17][18], and look-up table (LUT) models [19,20]. In particular, compact models are the mainstream ones and are composed of physics-based equations, which have been developed for decades.…”

Section: Introductionmentioning

confidence: 99%

Compact Modeling of Advanced Gate-All-Around Nanosheet FETs Using Artificial Neural Network

Zhao,

Xu,

Tang

et al. 2024

Micromachines

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As the architecture of logic devices is evolving towards gate-all-around (GAA) structure, research efforts on advanced transistors are increasingly desired. In order to rapidly perform accurate compact modeling for these ultra-scaled transistors with the capability to cover dimensional variations, neural networks are considered. In this paper, a compact model generation methodology based on artificial neural network (ANN) is developed for GAA nanosheet FETs (NSFETs) at advanced technology nodes. The DC and AC characteristics of GAA NSFETs with various physical gate lengths (Lg), nanosheet widths (Wsh) and thicknesses (Tsh), as well as different gate voltages (Vgs) and drain voltages (Vds) are obtained through TCAD simulations. Subsequently, a high-precision ANN model architecture is evaluated. A systematical study on the impacts of ANN size, activation function, learning rate, and epoch (the times of complete pass through the entire training dataset) on the accuracy of ANN models is conducted, and a shallow neural network configuration for generating optimal ANN models is proposed. The results clearly show that the optimized ANN model can reproduce the DC and AC characteristics of NSFETs very accurately with a fitting error (MSE) of 0.01.

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Section: Introductionmentioning

confidence: 99%

Compact Modeling of Advanced Gate-All-Around Nanosheet FETs Using Artificial Neural Network

Zhao,

Xu,

Tang

et al. 2024

Micromachines

View full text Add to dashboard Cite

show abstract

Capacitor-Less Low-Power Neuron Circuit with Multi-Gate Feedback Field Effect Transistor

2023

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Recently, research on artificial neuron circuits imitating biological systems has been actively studied. The neuron circuit can implement an artificial neural network (ANN) capable of low-power parallel processing by configuring a biological neural network system in hardware. Conventional CMOS analog neuron circuits require many MOSFETs and membrane capacitors. Additionally, it has low energy efficiency in the first inverter stage connected to the capacitor. In this paper, we propose a low-power neuron circuit with a multi-gate feedback field effect transistor (FBFET) that can perform integration without a capacitor to solve the problem of an analog neuron circuit. The multi-gate FBFET has a low off-current due to its low operating voltage and excellent sub-threshold characteristics. We replace the n-channel MOSFET of the inverter with FBFET to suppress leakage current. FBFET devices and neuron circuits were analyzed using TACD and SPICE mixed-mode simulation. As a result, we found that the neuron circuit with multi-gate FBFET has a low subthreshold slope and can completely suppress energy consumption. We also verified the temporal and spatial integration of neuron circuits.

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Macro-Modeling for N-Type Feedback Field-Effect Transistor for Circuit Simulation

Cited by 2 publications

References 28 publications

Compact Modeling of Advanced Gate-All-Around Nanosheet FETs Using Artificial Neural Network

Compact Modeling of Advanced Gate-All-Around Nanosheet FETs Using Artificial Neural Network

Capacitor-Less Low-Power Neuron Circuit with Multi-Gate Feedback Field Effect Transistor

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