2022
DOI: 10.1109/lmag.2022.3146132
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Magnetic Full Adder Based on Negative Differential Resistance-Enhanced Anomalous Hall Effect

Abstract: Spintronic logic devices have attracted attention because of the prospect of breaking the von-Neumann bottleneck through nonvolatile in-memory computing. Although varieties of spin Boolean logic gates have been proposed, spintronic arithmetic logic units such as adders have not been extensively studied because of the difficulties in application of the cascade method of CMOS-based logic in spintronic devices. Here, we experimentally demonstrated a spintronic full adder based on anomalous Hall effect and geometr… Show more

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Cited by 2 publications
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“…Because of its modest space and energy efficiency, this design is appropriate for high processors. The aspect ratio is changed to downsize the transistors and get a powerful '0' and '1' output [17]. The three modules are used to create the Hybrid Full Adder.…”
Section: Literature Surveymentioning
confidence: 99%
“…Because of its modest space and energy efficiency, this design is appropriate for high processors. The aspect ratio is changed to downsize the transistors and get a powerful '0' and '1' output [17]. The three modules are used to create the Hybrid Full Adder.…”
Section: Literature Surveymentioning
confidence: 99%