Majority logic gate for 3D magnetic computing

Abstract

For decades now, microelectronic circuits have been exclusively built from transistors. An alternative way is to use nano-scaled magnets for the realization of digital circuits. This technology, known as nanomagnetic logic (NML), may offer significant improvements in terms of power consumption and integration densities. Further advantages of NML are: non-volatility, radiation hardness, and operation at room temperature. Recent research focuses on the three-dimensional (3D) integration of nanomagnets. Here we show, for the first time, a 3D programmable magnetic logic gate. Its computing operation is based on physically field-interacting nanometer-scaled magnets arranged in a 3D manner. The magnets possess a bistable magnetization state representing the Boolean logic states '0' and '1.' Magneto-optical and magnetic force microscopy measurements prove the correct operation of the gate over many computing cycles. Furthermore, micromagnetic simulations confirm the correct functionality of the gate even for a size in the nanometer-domain. The presented device demonstrates the potential of NML for three-dimensional digital computing, enabling the highest integration densities.

Characterization of the magnetization reversal of perpendicular Nanomagnetic Logic clocked in the ns-range

“…The most basic component is an inverter, which comprises two magnets. The majority gates realized in 2D planar technology 9 and 3D monolithic integrated majority gates 8 have been proven to be able to execute NAND or NOR logic operations depending on one programmable input state. Using the above described devices it becomes possible to implement every logical function.…”

“…Beside the magnetic via which allows signal routing between the different functional layers 7 in all three dimensions also the computing in 3D was proven by a fully functional manufactured 3D majority logic gate. 8 The ability to avoid interconnections and 3D stacking of functional layers allows ultra-large scale integration of logic devices on a single die.…”

Experiment-based thermal micromagnetic simulations of the magnetization reversal for ns-range clocked nanomagnetic logic

“…The 3D nature of stray magnetic fields also enables very dense 3D integration through stacking functional layers as shown experimentally for magnetic vias and a 3D majority gate. 6,7 The CMOS compatibility with pNML is supported by the physical compact models integrated in industry standard CMOS design flow tools from "Cadence". 8…”

Modeling and simulation of nanomagnetic logic with cadence virtuoso using Verilog-A

“…Recently presented devices, such as Domain Wall Gates [5] or 1-bit full adders [6], demonstrated by experiment have proven the feasibility of this technique. Moreover, NML with perpendicular anisotropy (pNML) is suitable for monolithic 3D integration of devices and circuits enabling ultra large scale integration [7,8]. Compatibility to CMOS and its manufacturing process allows NML to be integrated along with common CMOS devices on a single silicon die, enabling hybrid pNML/CMOS circuits merging the benefits of both technologies.…”