Make the most out of your SIMD investments: counter control flow divergence in compiled query pipelines

Lang, Harald; Passing, Linnea; Kipf, Andreas; Boncz, Peter; Neumann, Thomas; Kemper, Alfons

doi:10.1007/s00778-019-00547-y

Cited by 7 publications

(2 citation statements)

References 19 publications

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“…It can also be used for noncompression algorithms like auto-correlation [23]. In the last years, people started to study again RLE-based algorithms [24][25] [26] to take advantage of the recent SIMD instruction sets.…”

Section: Run-length Encodingmentioning

confidence: 99%

How to speed Connected Component Labeling up with SIMD RLE algorithms

Lemaître¹,

Hennequin²,

Lacassagne³

2020

Proceedings of the 2020 Sixth Workshop on Programming Models for SIMD/Vector Processing

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The research in Connected Component Labeling, although old, is still very active and several efficient algorithms for CPUs and GPUs have emerged during the last years and are always improving the performance. This article introduces a new SIMD run-based algorithm for CCL. We show how RLE compression can be SIMDized and used to accelerate scalar run-based CCL algorithms. A benchmark done on Intel, AMD and ARM processors shows that this new algorithm outperforms the State-of-the-Art by an average factor of ×1.7 on AVX2 machines and ×1.9 on Intel Xeon Skylake with AVX512.

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Section: Run-length Encodingmentioning

confidence: 99%

How to speed Connected Component Labeling up with SIMD RLE algorithms

Lemaître¹,

Hennequin²,

Lacassagne³

2020

Proceedings of the 2020 Sixth Workshop on Programming Models for SIMD/Vector Processing

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show abstract

“…Data processing and database algorithms fit particularly well into this pattern. Their behavior is often highly predictable; and there are many examples that show how the awareness of resources and their uses in database code can significantly improve performance [1,14,15,18,26,31,34]. Fig.…”

Section: Task Model: Mxtasksmentioning

confidence: 99%

mxkernel: A Novel System Software Stack for Data Processing on Modern Hardware

et al. 2020

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Emerging hardware platforms are characterized by large degrees of parallelism, complex memory hierarchies, and increasing hardware heterogeneity. Their theoretical peak data processing performance can only be unleashed if the different pieces of systems software collaborate much more closely and if their traditional dependencies and interfaces are redesigned. We have developed the key concepts and a prototype implementation of a novel system software stack named mxkernel. For MxKernel, efficient large scale data processing capabilities are a primary design goal. To achieve this, heterogeneity and parallelism become first-class citizens and deep memory hierarchies are considered from the very beginning. Instead of a classical “thread” model, mxkernel provides a simpler control flow abstraction: mxtasks model closed units of work, for which mxkernel will guarantee the required execution semantics, such exclusive access to a specific object in memory. They can be a very elegant abstraction also for heterogeneity and resource sharing. Furthermore, mxtasks are annotated with metadata, such as code variants (to support heterogeneity), memory access behavior (to improve cache efficiency and support memory hierarchies), or dependencies between mxtasks (to improve scheduling and avoid synchronization cost). With precisely the required metadata available, mxkernel can provide a lightweight, yet highly efficient form of resource management, even across applications, operating system, and database. Based on the mxkernel prototype we present preliminary results from this ambitious undertaking. We argue that threads are an ill-suited control flow abstraction for our modern computer architectures and that a task-based execution model is to be favored.

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To share or not to share vector registers?

et al. 2022

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Query execution techniques in database systems constantly adapt to novel hardware features to achieve high query performance, in particular for analytical queries. In recent years, vectorization based on the Single Instruction Multiple Data parallel paradigm has been established as a state-of-the-art approach to increase single-query performance. However, since concurrent analytical queries running in parallel often access the same columns and perform a same set of vectorized operations, data accesses and computations among different queries may be executed redundantly. Various techniques have already been proposed to avoid such redundancy, ranging from concurrent scans via the construction of materialized views to applying multiple query optimization techniques. Continuing this line of research, we investigate the opportunity of sharing vector registers for concurrently running queries in analytical scenarios in this paper. In particular, our novel sharing approach relies on processing data elements of different queries together within a single vector register. As we are going to show, sharing vector registers to optimize the execution of concurrent analytical queries can be very beneficial in single-threaded as well as multi-thread environments. Therefore, we demonstrate the feasibility and applicability of such a novel work sharing strategy and thus open up a wide spectrum of future research opportunities.

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Make the most out of your SIMD investments: counter control flow divergence in compiled query pipelines

Cited by 7 publications

References 19 publications

How to speed Connected Component Labeling up with SIMD RLE algorithms

How to speed Connected Component Labeling up with SIMD RLE algorithms

mxkernel: A Novel System Software Stack for Data Processing on Modern Hardware

To share or not to share vector registers?

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