Management of Constraints in Vlsi Data Bases

Abstract

A methodology for management of constraints in VLSI data bases is presented in this paper. The process of management is based on formal mechanisms of attribute grammar theory. Examples ofa modularized knowledge representation ofa circuit at interconnection and logic levels based on attribute grammars illustrate the methodology. The ultimate goal and benefit of the proposed methodology is a well-defined development technique for VLSI design tools that will allow the user to generate a transfomzation system, a knowledge representation, and a system to manipulate this representation, all from a simple specification. In addition, context-dependent specifications at lower levels are automatically generated from the higherlevel specifications.