Sweden
Cover image:The cover image, by Ali Fazli and Amin Ojani, shows the digitization of an ECG signal. The piece of circuit illustrates a switched-capacitor integrator using correlated double sampling technique.Printed by LiU-Tryck, Linköping University Linköping, Sweden, 2013 iii To Sonya whose beauty, sweetness, and wisdom empower me to be the man that I am To my family whose boundless love and belief in me form the core of my being.
AbstractBiomedical electronics has gained significant attention in healthcare. A general biomedical device comprises energy source, analog-to-digital conversion (ADC), digital signal processing, and communication subsystem, each of which must be designed for minimum energy consumption to adhere to the stringent energy constraint.The ADC is a key building block in the sensing stage of the implantable biomedical devices. To lower the overall power consumption and allow full integration of a complete biomedical sensor interface, it is desirable to integrate the entire analog frontend, back-end ADC and digital processor in a single chip. While digital circuits benefit substantially from the technology scaling, it is becoming more and more difficult to meet the stringent requirements on linearity, dynamic range, and power-efficiency at lower supply voltages in traditional ADC architectures. This has recently initiated extensive investigations to develop low-voltage, low-power, high-resolution ADCs in nanometer CMOS technologies. Among different ADCs, the ΔΣ converter has shown to be most suitable for high-resolution and low-speed applications due to its high linearity feature.This thesis investigates the design of high-resolution and power-efficient ΔΣ modulators at very low frequencies. In total, eight discrete-time (DT) modulators have been designed in a 65nm CMOS technology: two active modulators, two hybrid activepassive modulators, two ultra-low-voltage modulators operated at 270mV and 0.5V supply voltages, one fully passive modulator, and a dual-mode ΔΣ modulator using variable-bandwidth amplifiers.The two active modulators utilize traditional feedback architecture. The first design presents a simple and robust low-power second-order ΔΣ modulator for accurate data conversion in implantable rhythm management devices such as cardiac pacemakers. Significant power reduction is achieved by utilizing a two-stage load-compensated OTA vi as well as the low-V th devices in analog circuits and switches. An 80dB SNR (13-bit) was achieved at the cost of 2.1µW power in 0.033mm 2 chip core area. The second design introduces a third-order modulator adopting the switched-opamp and partially body-driven gain-enhanced techniques in the OTAs for low-voltage and low-power consumption. The modulator achieves 87dB SNDR over 500Hz signal bandwidth, consuming 0.6µW at 0.7V supply.The two hybrid modulators were designed using combined SC active and passive integrators to partially eliminate the analog power associated with the active blocks. The first design employs an active integrator in the 1 s...