Many-Core Branch-and-Bound for GPU Accelerators and MIC Coprocessors

Melab, Nouredine; Gmys, Jan; Mezmaz, Mohand; Tuyttens, Daniel

doi:10.1007/978-3-030-18764-4_12

Cited by 5 publications

(3 citation statements)

References 14 publications

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“…Earlier GPUs were mainly used to accelerate graphics processing until NVIDIA introduced the general purpose parallel computing architecture called CUDA (Compute Unified Device Architecture) which expanded the scope of GPU applications and made GPU dominate in areas such as high performance computing, artificial intelligence computing, and parallel computing. For most parallel applications, GPUs are able to provide better performance than CPUs [1]. Modern GPU architectures are based on the Single Instruction Multiple Thread (SIMT) computing model, where 32 threads form a warp that executes the same instructions and processes different data at the same time.…”

Section: Introductionmentioning

confidence: 99%

LFWS: Long-Operation First Warp Scheduling Algorithm to Effectively Hide the Latency for GPUs

LIU

Zhao

et al. 2023

IEICE Trans. Fundamentals

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GPUs have become the dominant computing units to meet the need of high performance in various computational fields. But the long operation latency causes the underutilization of on-chip computing resources, resulting in performance degradation when running parallel tasks on GPUs. A good warp scheduling strategy is an effective solution to hide latency and improve resource utilization. However, most current warp scheduling algorithms on GPUs ignore the ability of long operations to hide latency. In this paper, we propose a long-operation-first warp scheduling algorithm, LFWS, for GPU platforms. The LFWS filters warps in the ready state to a ready queue and updates the queue in time according to changes in the status of the warp. The LFWS divides the warps in the ready queue into long and short operation groups based on the type of operations in their instruction buffers, and it gives higher priority to the long-operating warp in the ready queue. This can effectively use the long operations to hide some of the latency from each other and enhance the system's ability to hide the latency. To verify the effectiveness of the LFWS, we implement the LFWS algorithm on a simulation platform GPGPU-Sim. Experiments are conducted over various CUDA applications to evaluate the performance of LFWS algorithm, compared with other five warp scheduling algorithms. The results show that the LFWS algorithm achieves an average performance improvement of 8.01% and 5.09%, respectively, over three traditional and two novel warp scheduling algorithms, effectively improving computational resource utilization on GPU.

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Section: Introductionmentioning

confidence: 99%

LFWS: Long-Operation First Warp Scheduling Algorithm to Effectively Hide the Latency for GPUs

LIU

Zhao

et al. 2023

IEICE Trans. Fundamentals

View full text Add to dashboard Cite

show abstract

“…In addition, many‐cores computing platforms, e.g., graphics processing units (GPUs) and many integrate cores (MICs), have been involved in the development of some parallel algorithms to speed up the processing times 2 ; such approaches are expected to become mainstream in the near future. Experimental results have shown that parallelized algorithms can significantly improve computation speed and provide better acceleration efficiency 3‐5 . Usually, there are different kinds of serial image‐enhancement algorithms that need to be parallelized in several high‐performance computing (HPC) platforms using various parallel programming models, for example, massage passing interface (MPI), OpenMP, compute unified device architecture (CUDA), OpenCL, and OpenACC, etc.…”

Section: Introductionmentioning

confidence: 99%

“…Experimental results have shown that parallelized algorithms can significantly improve computation speed and provide better acceleration efficiency. [3][4][5] Usually, there are different kinds of serial…”

mentioning

confidence: 99%

Preliminary study on the automatic parallelism optimization model for image enhancement algorithms based on Intel's® Xeon Phi

Huang

Yang

Jian

et al. 2021

Concurrency and Computation

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In unmanned aerial vehicle (UAV) image-processing applications, one needs to implement different parallel image-enhancement algorithms on several high-performance computing platforms utilizing various programming models. To speed up the parallelization procedure and improve its efficiency, the automatic parallel software package, Par4All, is applied in this work. We find that the performance of the original automatic parallelization algorithm produced with Par4All is inefficient. To resolve this problem, we propose different optimization approaches for Par4All based on Intel®'s Xeon Phi high-performance computing platform that are based on the structural features of the image-enhancement algorithms, which can further optimize the original parallel algorithm. These approaches mainly include: (1) Par4All automatic parallel search module optimization, (2) dynamic thread setting optimization, and (3) the collaborative parallelization of both CPU and many integrated core (MIC) processors.According to the results of the comparison experiments involving different algorithms, it is shown that the proposed optimization approaches for these kinds of algorithms can significantly improve the performance of automatic parallel algorithms. The acceleration ratio increases approximately by 30%, 70%, and 80% for the multiscale Retinex, Gaussian-filtering and median-filtering algorithms, respectively. As continuation and deepening of our previous research work, this research has the potential to be beneficial for other researchers in image-processing applications with image-enhancement algorithms. K E Y W O R D Sautomatic parallelism, image-enhancement algorithms, Par4All, Intel® Xeon Phi, unmanned aerial vehicles INTRODUCTIONAs mentioned by References 1, it is known that some image-enhancement algorithms, for example, median filtering, Gaussian filtering, wavelet transform, and the multiscale Retinex (MSR) algorithm, are used when preprocessing large amounts of unmanned aerial vehicle (UAV) remote-sensing (RS) images to solve the problems of poor clarity, insufficient contrast and low adaptability. In addition, many-cores computing platforms, e.g., graphics processing units (GPUs) and many integrate cores (MICs), have been involved in the development of some parallel algorithms to speed up the processing times 2 ; such approaches are expected to become mainstream in the near future. Experimental results have shown that parallelized algorithms can significantly improve computation speed and provide better acceleration efficiency. [3][4][5] Usually, there are different kinds of serial

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A novel warp scheduling scheme considering long-latency operations for high-performance GPUs

et al. 2019

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Many-Core Branch-and-Bound for GPU Accelerators and MIC Coprocessors

Cited by 5 publications

References 14 publications

LFWS: Long-Operation First Warp Scheduling Algorithm to Effectively Hide the Latency for GPUs

LFWS: Long-Operation First Warp Scheduling Algorithm to Effectively Hide the Latency for GPUs

Preliminary study on the automatic parallelism optimization model for image enhancement algorithms based on Intel's® Xeon Phi

A novel warp scheduling scheme considering long-latency operations for high-performance GPUs

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