Map-and-Conquer: Energy-Efficient Mapping of Dynamic Neural Nets onto Heterogeneous MPSoCs

Bouzidi, Halima; Odema, Mohanad; Ouarnoughi, Hamza; Niar, Smail; Al Faruque, Mohammad Abdullah

doi:10.1109/dac56929.2023.10247722

Search citation statements

Order By: Relevance

Paper Sections

Select...

Citation Types

Supporting

Mentioning

Contrasting

Year Published

2023

2024

Publication Types

Select...

Other3

Article2

Relationship

Self Cite0

Independent5

Authors

Journals

Cited by 5 publications

References 19 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

Leveraging Temporal Patterns: Automated Augmentation to Create Temporal Early Exit Networks for Efficient Edge AI

Sponner,

Servadei,

Waschneck

et al. 2024

IEEE Access

View full text Add to dashboard Cite

Leveraging Temporal Patterns: Automated Augmentation to Create Temporal Early Exit Networks for Efficient Edge AI

Sponner,

Servadei,

Waschneck

et al. 2024

IEEE Access

View full text Add to dashboard Cite

Multi-Accelerator Neural Network Inference via TensorRT in Heterogeneous Embedded Systems

Zhou,

Guo,

Dong

et al. 2024

2024 IEEE 48th Annual Computers, Software, and Applications Conference (COMPSAC)

View full text Add to dashboard Cite

Energy-Efficient Use of an Embedded Heterogeneous SoC for the Inference of CNNs

Archet,

Ventroux,

Gac

et al. 2023

2023 26th Euromicro Conference on Digital System Design (DSD)

View full text Add to dashboard Cite

Energy efficiency is key in many embedded systems in order to reach the best performance on a limited power budget. In addition, new applications based on neural networks integrate various processing requirements, leading to the use of dedicated hardware functions to optimize energy efficiency. Heterogeneous system-on-chips (SoC) bring together different computing capabilities, such as the Nvidia Jetson AGX Orin. This type of SoC includes a CPU for general-purpose processing, a GPU for intensive data parallelism, and a Deep Learning Accelerator (DLA) dedicated to neural network processing Together, these three components enable new latency and energy consumption trade-offs for Deep-Learning-based applications. But finding the right configuration to reach the best energy efficiency is difficult and sometimes counterintuitive. To take this into account, this paper studies deep neural network design and inference options for each accelerator. Altogether, the study forms guidelines to specifically make the best use of the computing and energy-efficiency capabilities published by manufacturers with the default TensorRT mapping.

show abstract

Map-and-Conquer: Energy-Efficient Mapping of Dynamic Neural Nets onto Heterogeneous MPSoCs

Cited by 5 publications

References 19 publications

Leveraging Temporal Patterns: Automated Augmentation to Create Temporal Early Exit Networks for Efficient Edge AI

Leveraging Temporal Patterns: Automated Augmentation to Create Temporal Early Exit Networks for Efficient Edge AI

Multi-Accelerator Neural Network Inference via TensorRT in Heterogeneous Embedded Systems

Energy-Efficient Use of an Embedded Heterogeneous SoC for the Inference of CNNs

Contact Info

Product

Resources

About