Masked SABL: A Long Lasting Side-Channel Protection Design Methodology

Fadaeinia, Bijan; Anik, Toufiq Hasan; Karimi, Naghmeh; Moradi, Amir

doi:10.1109/access.2021.3090752

Cited by 5 publications

(5 citation statements)

References 32 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Countermeasures against PA attacks involve hiding [14,Sec. 7] strategies, which reduce the SNR to conceal information mostly by power balancing (e.g., sense amplifier based logic (SABL) [15] and WDDL [13]) and masking [3] techniques (e.g., threshold implementation (TI)) that utilize secret sharing and multiparty computing to generate random intermediate values. In contrast, to detect FIAs, one may use concurrent error-detection (CED) schemes.…”

Section: A Background On Physical Attack Countermeasuresmentioning

confidence: 99%

“…However, the security of such protection cannot be ensured since imperfections in the activity occultation mechanism can lead to exploitable leakage arising from any gate of the netlist [54]. Moreover, balancing in dual rails can be impacted by aging leading to more leakage by increasing attack SR [15], [55]. This is the reason why masking logic is preferred.…”

Section: Present S-box Implementationsmentioning

confidence: 99%

See 1 more Smart Citation

On the Resiliency of Protected Masked S-Boxes Against Template Attack in the Presence of Temperature and Aging Misalignments

Anik,

Danger,

Guilley

et al. 2024

IEEE Trans. VLSI Syst.

Self Cite

View full text Add to dashboard Cite

Profiling side-channel analysis (SCA) attacks have received a lot of attention in the recent years. To perpetrate these attacks, the adversary creates a profile of a sensitive device at her disposal, and uses it to model a target device with a similar implementation to extract its key. Template attacks are recognized to be the most powerful profiling attacks when the measurement noise is Gaussian. To tackle SCA attacks, different countermeasures have been proposed in the literature, among which masking schemes have received the utmost attention. By adding randomness to the circuit, masking schemes prevent the adversary from relating the power consumption to the evaluated data, thus making the attack more difficult. In this article, we study the protection provided by several masking schemes against template attacks. More precisely, we investigate how the success of the template attack is changed when there is a misalignment between the target and profiling devices in terms of temperature and process variations. As another innovative analysis angle, we extensively study the impact of device aging on the template attack and demonstrate quantitatively how aging misalignments in side-channel traces, between the profiling and the target devices, do hinder the attack. The main objective of this study is to get accurate and numerous results allowing the designer to compare different implementations of masking and accordingly choose one which corresponds to the best compromise among complexity, security, and sensitivity to temperature and aging. We target the S-Box module of the unprotected PRESENT cipher along with its five masking variants including global lookup table (GLUT), rotating S-Box masking (referred to as RSM-LOG hereafter), RSM with read-only memory (RSM-ROM), Ishai-Sahai-Wagner masking (ISW), and threshold implementation (TI). The unprotected circuit gets impacted by such aging misalignments with ≈12.5% increase in the number of traces needed to reach 80% success rate (SR) in the course of 20 weeks of aging at 105 • C. Such increase is 23.3%, 37.19%, and 38.24% for ISW, GLUT, and RSM-LOG, respectively. For RSM-ROM such increase is 193.37% for ten weeks of aging. Interestingly, TI is not much affected by aging in this regard.

show abstract

Section: A Background On Physical Attack Countermeasuresmentioning

confidence: 99%

Section: Present S-box Implementationsmentioning

confidence: 99%

On the Resiliency of Protected Masked S-Boxes Against Template Attack in the Presence of Temperature and Aging Misalignments

Anik,

Danger,

Guilley

et al. 2024

IEEE Trans. VLSI Syst.

Self Cite

View full text Add to dashboard Cite

show abstract

“…As in the case of MDPL, where both hiding and masking techniques are implemented together in the same logic style to withstand DPA attacks, masked-SABL is also presented [81]. In this case, the authors include in the SABL logic style the use of a mask m to prevent the unbalance produced in the circuit connections due to aging.…”

Section: Gate-level Maskingmentioning

confidence: 99%

“…The authors conclude that the mask bit value can be determined by a first analysis of the power consumption traces. For this reason, logic styles that use both masking and hiding techniques are potentially capable of achieving better security levels, as well as resistance against aging effects, as considered in [81].…”

Section: Gate-level Maskingmentioning

confidence: 99%

Gate-Level Hardware Countermeasure Comparison against Power Analysis Attacks

et al. 2022

View full text Add to dashboard Cite

The fast settlement of privacy and secure operations in the Internet of Things (IoT) is appealing in the selection of mechanisms to achieve a higher level of security at minimum cost and with reasonable performances. All these aspects have been widely considered by the scientific community, but more effort is needed to allow the crypto-designer the selection of the best style for a specific application. In recent years, dozens of proposals have been presented to design circuits resistant to power analysis attacks. In this paper, a deep review of the state of the art of gate-level countermeasures against power analysis attacks has been carried out, performing a comparison between hiding approaches (the power consumption is intended to be the same for all the data processed) and the ones considering a masking procedure (the data are masked and behave as random). The most relevant proposals in the literature, 35 for hiding and 6 for masking, have been analyzed, not only by using data provided by proposers, but also those included in other references for comparison. Advantages and drawbacks of the proposals are analyzed, showing quantified data for cost, performance (delay and power), and security when available. One of the main conclusions is that the RSL proposal is the best in masking, while TSPL, HDRL, SDMLp, 3sDDL, TDPL, and SABL are those with the best security performance figures. Nevertheless, a wise combination of hiding and masking as masked_SABL presents promising results.

show abstract

“…The impact of aging on the success of power analysis attacks, in particular in the circuits equipped with dual-rail countermeasures have been studied in recent literature [9], and countermeasures to enhance the security of such circuits when device aging comes into account have been proposed in [10]. However, to the best of the authors' knowledge, there is no study in the open literature that quantitatively discusses how the security of cryptographic devices, that are under fault-injection attacks, can be affected by device aging.…”

Section: Introductionmentioning

confidence: 99%

Does Aging Matter? The Curious Case of Fault Sensitivity Analysis

Ebrahimabadi

Fadaeinia

Moradi

et al. 2022

2022 23rd International Symposium on Quality Electronic Design (ISQED)

Self Cite

View full text Add to dashboard Cite

An adversary with physical access to a cryptographic device may place the device under an external stress such as overclocking, and under-volting in order to generate erroneous outputs based on which the keys can be retrieved. Among fault-injection attacks, Fault Sensitivity Analysis (FSA) has received considerable attention in recent years as in this attack the adversary does not need to know the faulty output; rather he/she only needs to know whether the injected fault has led to an error or not. Although fault-injection attacks, and in particular FSA, have been extensively studied in literature and a number of countermeasures have been proposed to mitigate these attacks, the impact of device aging on the success of these attacks is still an open question. Due to aging, the specifications of transistors deviate from their fabrication-time specification, leading to a change of circuit's delay over time. In this paper, we focus on the impact of aging in collision timing attacks (one of the strongest variant of FSA attacks). The corresponding results, realized by extensive HSpice simulations, show that the aging-induced impacts can facilitate such an attack. This calls for aging-resilient countermeasures that sustain the security over the lifetime of the cryptographic devices.

show abstract

Masked SABL: A Long Lasting Side-Channel Protection Design Methodology

Cited by 5 publications

References 32 publications

On the Resiliency of Protected Masked S-Boxes Against Template Attack in the Presence of Temperature and Aging Misalignments

On the Resiliency of Protected Masked S-Boxes Against Template Attack in the Presence of Temperature and Aging Misalignments

Gate-Level Hardware Countermeasure Comparison against Power Analysis Attacks

Does Aging Matter? The Curious Case of Fault Sensitivity Analysis

Contact Info

Product

Resources

About