Matador: An Exploration Environment for System-Design

Abstract

We present a modular platform simulation environment to estimate the energy consumption and performance of distributed systems in a Systems-on-Chip context. We use the simulation environment to support the development of our high-level design methodologies. More in particular, we steer and verify the development of a task-level data transfer and storage methodology, the development of a task-level scheduling methodology and the development of an instruction memory management methodology. All of these methodologies are focussed on reducing the overall energy consumption of the complex dynamic system on a heterogeneous platform architecture. Compared to research in the academic and industrial context, our contribution is to integrate in a scalable way existing energy and performance simulators of the components of a heterogeneous multiprocessor SoC. Also a novel instruction memory hierarchy is included. The simulation environment consists of multiple processing nodes connected to a distributed memory hierarchy. To reduce the energy consumption of the system, both the processing nodes as well as the memory architecture can be varied: the processing voltage of each node can be tuned and the memory hierarchy can be fully customized. The integration of dynamic real-time applications on this platform is simplified by the availability of a multi-processor RTOS. The use of the simulator to develop our high-level design methodologies is illustrated on real-life multimedia applications.

Linking run-time resource management of embedded multi-core platforms with automated design-time exploration

“…It identifies the sub-tasks of the application that can run in parallel on a heterogeneous multi-processor platform. It also includes data access and memory management at the task level [2,23].…”