Measurement of isotype heterojunction barriers by <i>C</i>-<i>V</i> profiling

Kroemer, H.; Chien, Wu‐Yi; Harris, J. S.; Edwall, D. D.

doi:10.1063/1.91467

Cited by 395 publications

(66 citation statements)

References 7 publications

Supporting

Mentioning

Contrasting

Unclassified

Order By: Relevance

“…As discussed in more detail elsewhere, 18 the behavior at high frequency ͑1 MHz͒ can be understood by considering the free electron response at the conduction band offset of the Ge-Si heterojunction. [52][53][54][55][56][57] However, the pronounced dispersion observed at lower frequencies points to the presence of deep͑er͒ trap states, [58][59][60] which are most likely associated with the confined network of Fig. 8b, for the PG annealed sample of Fig.…”

Section: Extended Defects In Selective Epitaxial Ge-in-stimentioning

confidence: 99%

Extended-Defect Aspects of Ge-on-Si Materials and Devices

Simoen

Eneman

Wang

et al. 2010

J. Electrochem. Soc.

View full text Add to dashboard Cite

Extended-defect aspects of state-of-the-art Ge-on-Si materials and devices are discussed with an emphasis on the impact of postgrowth thermal budget on the structural and electrical epilayer characteristics. The observations on the annealed thick and thin epitaxial layers on Si can be explained based on a thermodynamic model for the minimum density of threading dislocations ͑TDs͒. For the present processing conditions, the leakage current of Ge complementary metal oxide semiconductor compatible p + n junctions becomes independent of the TD density at about 10 7 cm −2 . © 2009 The Electrochemical Society. ͓DOI: 10.1149/1.3267514͔ All rights reserved. Defect engineering is a common practice in silicon-based integrated circuit and solar cell technology and has been extensively investigated during the past 2 decades, leading to its successful implementation in manufacturing lines. In addition, for sub-45 nm technologies, strain engineering is required to boost the device performance in agreement with the International Technology Roadmap for Semiconductors. In recent years, strong research efforts have also been focusing on the use of Ge-based channels for the sub-22 nm complementary metal oxide semiconductor ͑CMOS͒ node, 1 whereby epitaxial Ge-on-Si has a very strong potential. This also opens the door to achieve a full monolithic integration of Ge and III-V materials on a silicon substrate, leading to system-on-chip applications. The main challenge of the epitaxial deposition of Ge on Si is the 4% lattice mismatch and the difference in thermal expansion coefficient, which readily leads to the buildup of mechanical stress and, subsequently, its relaxation by the generation of misfit and threading dislocations ͑TDs͒.2,3 Therefore, the control of misfit and TDs during both substrate preparation and device processing is a must to arrive at a good-yielding, high performing technology. The aim of this paper is to summarize our recent developments in Geon-Si materials and devices and to address the remaining challenges. An extensive overview of the foregoing work can be found in Chap. 4 of Ref. 4.The focus in this work is on the defect formation and control during the fabrication of Ge virtual substrates on silicon by chemical vapor deposition. Hereby, several approaches can be followed 2-4 to optimize the threading dislocation density ͑TDD͒ either by the use of a relaxed SiGe-graded buffer layer or by the direct deposition of a thick Ge epitaxial layer on silicon. Three different cases are considered, whereby the impact of a postgrowth ͑PG͒ anneal on the TDD is highlighted, and the impact on the electrical device performance is mainly evaluated through the leakage current of p + n junctions fabricated in these layers. The procedures to separate the area from the perimeter leakage current have been outlined previously. 5,6 It is demonstrated that a PG anneal or thermal budget may have both beneficial and detrimental effects, depending on the application and type of layer. For a relaxed virtual Ge substrate, the PG anneali...

show abstract

Section: Extended Defects In Selective Epitaxial Ge-in-stimentioning

confidence: 99%

Extended-Defect Aspects of Ge-on-Si Materials and Devices

Simoen

Eneman

Wang

et al. 2010

J. Electrochem. Soc.

View full text Add to dashboard Cite

show abstract

“…After much advancement and commercialization in GaAs-based devices, AlGaN/GaNbased HEMTs are getting increasing demand due to their higher bandgap and greater temperature handling capacity. Large polarization constants of these materials induce a high density of 2D electron gas (2DEG) 5-10 times greater than that in other III-V material [11,12]. This is true even in undoped structures where the 2DEG is induced entirely from polarization effects, which further increases carrier mobility since no impurity scattering will be present.…”

Section: Hemt Device Structure Under Studymentioning

confidence: 75%

“…TH DS RV hh  (11) This procedure repeated at different values of V DS in the saturation region and 1/h can be plotted versus V DS . If the model is correct, the plot should be a straight line based on eq (11), and R TH can be obtained as the slope of the best fit line.…”

mentioning

confidence: 99%

Thermal Analysis of AlGaN/GaN HEMT: Measurement and Analytical Modeling Techniques

Raj¹,

Bindra²

2013

IJCA

View full text Add to dashboard Cite

In this paper, the temperature dependent electrical measurements by employing a Quantum Focus Instrument (QFI) and analytical analysis were presented and applied to Aluminum Gallium Nitride, Gallium Nitride (AlGaN-GaN) High Electron-Mobility Transistors (HEMTs). The analytical evaluation of band bap energy, electron mobility, thermal conductivity and thermal resistance has been carried out. The electrical measurements have been done using network analyzer with infrared IR measurement technology. The results obtained on the basis of electrical measurements are compared with analytical and simulated results for the purpose of validation of our outcomes. The measured data shows a good agreement with analytical and simulated results, thereby validating our approach of AlGaN/GaN HEMT analysis.

show abstract

“…As has been established earlier, 20,29 there exists a certain discrepancy between the true and "apparent" concentration profiles of free charge carriers near a heterojunction, a quantum well or a quantum dot.…”

Section: Results Of Simulation and Discussionmentioning

confidence: 95%

Determination of band offsets in strainedInxGa1−xAs∕GaAsquantum

et al. 2004

View full text Add to dashboard Cite

The results of measurements and numerical simulation of charge carrier distribution and energy states in strained quantum wells InxGa1−xAs/GaAs (0.06 x 0.29) by C-V-profiling are presented. Precise values of conduction band offsets for these pseudomorphic QWs have been obtained by means of self-consistent solution of Schrödinger and Poisson equations and following fitting to experimental data. For the conduction band offsets in strained InxGa1−xAs/GaAs -QWs the expression ∆EC(x) = 0.814x − 0.21x 2 has been obtained.

show abstract

Measurement of isotype heterojunction barriers by C-V profiling

Cited by 395 publications

References 7 publications

Extended-Defect Aspects of Ge-on-Si Materials and Devices

Extended-Defect Aspects of Ge-on-Si Materials and Devices

Thermal Analysis of AlGaN/GaN HEMT: Measurement and Analytical Modeling Techniques

Determination of band offsets in strainedInxGa1−xAs∕GaAsquantum

Contact Info

Product

Resources

About