Measurement sampling frequency impact on determining magnitude of pattern placement errors on photomasks

Whittey, John M.; Laske, Frank; Roeth, Klaus-Dieter; McCormack, John E.; Adam, Dieter; Bender, Jochen; Berglund, C. N.; Takac, Michael T.; Chou, Seurien

doi:10.1117/12.833495

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“…Since the overlay error between two masks should be considered for double patterning lithography, requirement of image placement error should be reduced by 70% of single patterning process. There are several source of placement error on mask such as grid error, charging effect on resist [1] , measurement error [2] , distortion due to the pellicle mounting [3] and beam positioning error [4][5] and so on. (Figure 2) These sources of error have studied in many research groups in order to reduce the troubles that caused by position error of pattern on mask.…”

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confidence: 99%

Deflector contamination in E-beam mask writer and its effect on pattern placement error of photomask for sub 20nm device node

et al. 2012

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One of the concerned phenomena that influencing to the performance of electron beam mask writer is contamination of deflector. Previous studies show that the relation between the deflector contamination and pattern placement error. In fact, the source of the contamination of deflector was not defined clearly yet. However, the fact that of deflector contamination clearly influences the pattern placement error on mask fabrication. We think that there is no detailed investigation about the effect of deflector contamination on the pattern placement error of production photomask. This paper will describe the effect of e-beam positioning error due to the contamination of deflector in electron optic system. To reduce the placement error by the deflector contamination circumstance the e-beam drift was evaluated in various conditions of deflection based on the theoretical assumption and our own modeling, and optimization of the deflection condition. Furthermore, we will present the requirements on position accuracy of deflector for the photomask of sub 20nm device node.

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