Measuring Energy and Power with PAPI

Weaver, Vincent M.; Johnson, Matt; Kasichayanula, Kiran; Ralph, James; Łuszczek, Piotr; Terpstra, Dan; Moore, Shirley

doi:10.1109/icppw.2012.39

Cited by 158 publications

(94 citation statements)

References 26 publications

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“…For both of our target processors we read specific hardware registers/counters able to provide energy or power readings. This simple approach has been validated with hardware power meters by third parties studies for recent NVIDIA GPUs and Intel CPUs [15], showing that it produces accurate results [16,31]. In this approach we cannot monitor the power drain of the motherboard and other ancillary hardware; recent studies have shown however that the power drain of those components is approximately constant in time and weakly correlated with code execution [15,32].…”

Section: Methodsmentioning

confidence: 99%

“…Our library also lets benchmarking codes to place markers in the data stream in order to have an accurate time correlation between the running kernels and the acquired power/energy values. For added portability of the instrumentation code, we exploited the PAPI Library [31] as a common API for energy/power readings for the different processors, partially hiding architectural details. The wrapper code, exploiting the PAPI library, is available for download as Free Software [33].…”

Section: Methodsmentioning

confidence: 99%

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Evaluation of DVFS techniques on modern HPC processors and accelerators for energy‐aware applications

Calore

Gabbana

Schifano

et al. 2017

Concurrency and Computation

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SUMMARYEnergy efficiency is becoming increasingly important for computing systems, in particular for large scale HPC facilities. In this work we evaluate, from an user perspective, the use of Dynamic Voltage and Frequency Scaling (DVFS) techniques, assisted by the power and energy monitoring capabilities of modern processors in order to tune applications for energy efficiency. We run selected kernels and a full HPC application on two high-end processors widely used in the HPC context, namely an NVIDIA K80 GPU and an Intel Haswell CPU. We evaluate the available trade-offs between energy-to-solution and time-to-solution, attempting a function-by-function frequency tuning. We finally estimate the benefits obtainable running the full code on a HPC multi-GPU node, with respect to default clock frequency governors. We instrument our code to accurately monitor power consumption and execution time without the need of any additional hardware, and we enable it to change CPUs and GPUs clock frequencies while running. We analyze our results on the different architectures using a simple energy-performance model, and derive a number of energy saving strategies which can be easily adopted on recent high-end HPC systems for generic applications.

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Section: Methodsmentioning

confidence: 99%

Section: Methodsmentioning

confidence: 99%

Evaluation of DVFS techniques on modern HPC processors and accelerators for energy‐aware applications

Calore

Gabbana

Schifano

et al. 2017

Concurrency and Computation

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“…A number of PAPI components have been publicly available since the PAPI 5.0.0 release, allowing for transparent power and energy readings via (a) the Intel RAPL ("Running Average Power Limit") interface [16] for Intel Sandy Bridge chips and its successors, and (b) the NVML ("NVIDIA Management Library") interface [17] for NVIDIA GPUs. More details on this work is described in [5], [6], [7]. In recent work, we build on these results and extended PAPI's current power monitoring features to other architecture; specifically Intel Xeon Phi coprocessors and the IBM Blue Gene/Q architecture.…”

Section: A Performance Api (Papi)mentioning

confidence: 99%

“…We have already demonstrated the merit of transparent access to power and energy measurements via PAPI for Intel Sandy Bridge (and its successors) and for NVIDIA GPUs in [5]; the viability of PAPI RAPL energy consumption and power profiles for studying advanced dense numerical linear algebra in [6]; and the relevance of PAPI providing power and energy measurement abilities for virtualized cloud environments in [7]. Recently, an additional effort has been made to extend the Performance API with new components supporting transparent power monitoring capabilities for Intel Xeon Phi co-processors and the IBM Blue Gene/Q system.…”

Section: Introductionmentioning

confidence: 99%

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Power monitoring with PAPI for extreme scale architectures and dataflow-based programming models

McCraw

Ralph

Danalis

et al. 2014

2014 IEEE International Conference on Cluster Computing (CLUSTER)

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Abstract-For more than a decade, the PAPI performancemonitoring library has provided a clear, portable interface to the hardware performance counters available on all modern CPUs and other components of interest (e.g., GPUs, network, and I/O systems). Most major end-user tools that application developers use to analyze the performance of their applications rely on PAPI to gain access to these performance counters.One of the critical roadblocks on the way to larger, more complex high performance systems, has been widely identified as being the energy efficiency constraints. With modern extreme scale machines having hundreds of thousands of cores, the ability to reduce power consumption for each CPU at the software level becomes critically important, both for economic and environmental reasons. In order for PAPI to continue playing its well established role in HPC, it is pressing to provide valuable performance data that not only originates from within the processing cores but also delivers insight into the power consumption of the system as a whole.An extensive effort has been made to extend the Performance API to support power monitoring capabilities for various platforms. This paper provides detailed information about three components that allow power monitoring on the Intel Xeon Phi and Blue Gene/Q. Furthermore, we discuss the integration of PAPI in PARSEC -a task-based dataflow-driven execution engine -enabling hardware performance counter and power monitoring at true task granularity.

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