2003
DOI: 10.1117/12.486880
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Megapixel HgCdTe MWIR focal plane array with a 15-μm pitch

Abstract: In this paper we present the first demonstration at LETI infrared laboratory of a megapixel HgCdTe MWIR focal plane array with a 15µm pitch. The detectors were interconnected by indium bumps to the CMOS readout circuit. The design of these interconnections has been adapted from the standard CEA-LETI process to achieve resolution and uniformity required by the reduced pitch. Because of the mismatch of thermal dilatation coefficients between the substrate and the HgCdTe, specific developments were necessary in o… Show more

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Cited by 14 publications
(9 citation statements)
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“…This process allows yields extremely high, close to 100% to be achieved routinely on these large FPAs and with pitches as low as 15µm [9].…”
Section: Focal Plane Assemblymentioning
confidence: 96%
“…This process allows yields extremely high, close to 100% to be achieved routinely on these large FPAs and with pitches as low as 15µm [9].…”
Section: Focal Plane Assemblymentioning
confidence: 96%
“…This architecture leads to some symmetry with orthotropic properties: the indium solder bumps are aligned parallel/perpendicular to the edges of the detection circuit. Four main process steps are necessary to manufacture the detector (all steps are described in [16] ): the indium bump depositing on the silicon circuit, the hybridisation of the CdHgTe detection circuit, the underfilling step and the final detection circuit thinning. During the hybridisation step, heating until 430 K is applied (above indium melting temperature); then both mechanical and chemical polishings of the detector circuit are performed to keep the active detection CdHgTe layer very thin compared to the thickness of the silicon circuit.…”
Section: Presentation Of the Detector Architecturementioning
confidence: 99%
“…During hybridisation, before thinning, the detection circuit consists of two main layers, the CdHgTe epitaxial layer and a CdZnTe substrate [16] . In order to minimise the number of nodes in the model, the presence of the CdZnTe layer was not taken into account in the assembly.…”
Section: Geometric Hypotheses Boundary Conditions and Thermal Loadingsmentioning
confidence: 99%
“…Indium bump hybridization of mega pixel arrays was already demonstrated at this pitch ( Figure 8) [18][19] . …”
Section: Designmentioning
confidence: 99%