Memory bandwidth reduction using frame pipeline in video codec chips

Abstract

An image processing chip includes many image processing engines requesting heavy external memory access. So bus traffic is a critical issue in real-time systems. An video encoder is one of blocks requesting the most heavy external memory access among them. This letter presents a method to reduce the external memory requests for accessing reference frames in video codec chips. The method pipelines a video in a frame level, and the intermediate reconstructed data is used in the next frame without storing it to external memory. Thereby the proposed algorithm reduces the external memory access with reasonable internal memory increase.