Memory-efficient TCP reassembly using FPGA

Abstract

Nowadays, networking plays a very important role in businesses. The network infrastructure has been developing rapidly. Moreover, the invention of TCP protocol motivates a lot of network applications. Many of these applications require line rate processing of packets and reassembly of TCP packets for stateful processing. Several techniques are introduced to reassemble TCP packets on FPGA. However, they have some disadvantages such as inefficient memory, unscalable system, and unsupported complex TCP connections. In this paper, we propose a multilinked-list approach for TCP reassembly. Our architecture not only supports TCP connections with multiple out-of-sequence data segments but also uses memory more efficiently than others. The experimental results show that our system can hold about 256K connections simultaneously and support up to 46K out-ofsequence connections with only 64MB DRAM.