Memory protection in embedded systems

Abstract

With reference to an embedded system featuring no support for memory management, we present a model of a protection system based on passwords. At the hardware level, our model takes advantage of a memory protection unit (MPU) interposed between the processor and the complex of the main memory and the input-output devices. The MPU supports both concepts of a protection context and a protection domain. A protection context is a set of access rights for the memory pages; a protection domain is a set of one or more protection contexts. Passwords are associated with protection domains. A process that holds a given password can take advantage of this password to activate the corresponding domain. A small set of protection primitives makes it possible to modify the composition of the domains in a strictly controlled fashion.\ud The proposed protection model is evaluated from a number of important viewpoints, which include password distribution, review and revocation, the memory requirements for storage of the information concerning protection, and the time necessary for password validation

A Formal Model for the Automatic Configuration of Access Protection Units in MPSoC-Based Embedded Systems

“…It is then possible to employ MPU-like structures to protect the resources from specific masters. The approach presented in [9] targets system-on-chip (SoC) platforms with a single processor whose tasks need to be isolated from certain memory regions and I/O controllers. Similar approaches that are targeted at multi-master platforms are described in [10] and [11].…”

Extended pointers for memory protection in single address space systems

“…In a different approach, all the processes share a single address space [5], [6], [7], [8]. In this approach, two or more processes aimed at accessing the same given information item simply use the virtual address of this item.…”

Key management in wireless sensor networks

“…This situation is unlikely to change in the near future. Rather than supporting the addition of new sophisticated hardware functionalities, advances in integration technology are likely to be used to reduce the system size and cost [7], [8], [9].…”