Memory states in small arrays of Josephson junctions

Abstract

Abstract:We studied memory states of a circuit consisting of a small inductively coupled Josephson junction array and introduced basic (Write, Read, Reset) memory operations logics of the circuit. The presented memory operation paradigm is fundamentally different from conventional single quantum flux operation logics. We calculated stability diagrams of the zero-voltage states and outlined memory states of the circuit. We have also calculated memory access times and power dissipation for basic memory operations.PACS: 05.45.Xt, 85.25.Cp, 85.25.Hv

Parameter optimization for transitions between memory states in small arrays of Josephson junctions

“…Using and approximating equilibrium positions for each junction as calculated in [9], we calculate Compared to the value calculated numerically for a sample Write "1" pulse with , J, we see good agreement despite the somewhat large approximations used in the approximation. Further numerical experiments suggest that the method described above typically produces values with approximately 30% error compared to simulated values.…”

“…A description of the way external pulses can move between memory states is given in Table 1. Full details about circuit operation can be found in [8,9]. Table 1: Description of the operations of the proposed memory device: Applied junction is the junction to which a Gaussian pulse is applied and read junction is the junction from which voltage is read to confirm operation has taken place.…”

“…Write, Read, and Reset operations are applied to the same circuit to conserve area and decrease latency. In this paper, we describe the way in which these circuit parameter values affect the operation of the cryogenic memory circuit described in [8,9] and optimize these values to improve memory operation. Because this circuit operates in a highly nonlinear regime, small perturbations to circuit parameters can affect circuit performance and functionality.…”

“…In this Introduction section we review the critical components of the circuit design, define the values which are to be optimized, give a brief overview of the optimization results, and describe the method used to perform optimization studies. We also briefly review our circuit design, referring the reader to our papers [8,9] for further details. In the following sections, we describe the results of the optimization procedure and show that our results are relatively impervious to noise.…”

“…Numerical simulations are validated with approximate analytical results. 05.45.Xt, 85.25.Cp, 85.25.Hv Recently we introduced a simple memory paradigm based on the existence of multiple stable states present in a large variety of nonlinear systems [8,9]. The transitions between those states act as basic memory cell operations (Write, Read, and Reset).…”