Memristive devices for computing: Beyond CMOS and beyond von Neumann

Nguyen, Hoang Anh Du; Yu, Jintao; Xie, Lei; Taouil, Mottaqiallah; Hamdioui, Said; Fey, Dietmar

doi:10.1109/vlsi-soc.2017.8203479

Cited by 46 publications

(28 citation statements)

References 53 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Memristors can also hold their resistance state in the absence of an external active source. The electrical properties of a memristor depend on the physical mechanism or resistance switching, which could be due to metal ions forming a conductive bridge (CBRAM), movement of oxygen ions (RRAM), phase change of the active material (PCM) or self-directed channel (SDC) [16]. PCM memristors usually acquire only two states, one of high resistance (RESET or off-state) and another of low resistance (SET or on-state).…”

Section: Memristorsmentioning

confidence: 99%

Effects of memristive synapse radiation interactions on learning in spiking neural networks

2021

View full text Add to dashboard Cite

This study uses advanced modeling and simulation to explore the effects of external events such as radiation interactions on the synaptic devices in an electronic spiking neural network. Specifically, the networks are trained using the spike-timing-dependent plasticity (STDP) learning rule to recognize spatio-temporal patterns (STPs) representing 25 and 100-pixel characters. Memristive synapses based on a TiO2 non-linear drift model designed in Verilog-A are utilized, with STDP learning behavior achieved through bi-phasic pre- and post-synaptic action potentials. The models are modified to include experimentally observed state-altering and ionizing radiation effects on the device. It is found that radiation interactions tend to make the connection between afferents stronger by increasing the conductance of synapses overall, subsequently distorting the STDP learning curve. In the absence of consistent STPs, these effects accumulate over time and make the synaptic weight evolutions unstable. With STPs at lower flux intensities, the network can recover and relearn with constant training. However, higher flux can overwhelm the leaky integrate-and-fire post-synaptic neuron circuits and reduce stability of the network.

show abstract

Section: Memristorsmentioning

confidence: 99%

Effects of memristive synapse radiation interactions on learning in spiking neural networks

2021

View full text Add to dashboard Cite

show abstract

“…• CIM-Periphery (CIM-P): In CIM-P, the computation result is produced within the peripheral circuitry. Examples of such architectures are PRIME [26], Pinatubo [27], CIM-Accelerator [28], etc. This architecture focuses on special circuits in the peripherals to realize, for example, bit-wise logic operations [27,29], matrix-vector multiplication [6,30], etc.…”

Section: A Cim Concept and Classificationmentioning

confidence: 99%

Testing Computation-in-Memory Architectures Based on Emerging Memories

Hamdioui

Fieback

Nagarajan

et al. 2019

2019 IEEE International Test Conference (ITC)

Self Cite

View full text Add to dashboard Cite

Today's computing architectures and device technologies are becoming incapable of meeting the increasingly stringent demands on energy and performance posed by evolving applications. Therefore, alternative novel post-CMOS computing architectures are being explored. Some of these are Computationin-Memory (CIM) architectures based on memristive devices; they integrate the processing units and the storage in the same physical location (i.e., the memory based on memristive devices). Due to their advanced manufacturing processes, use of new materials, and dual functionality, testing such chips requires specific schemes and therefore special attention. This paper describes the need for testing CIM architectures, proposes a systematic test approach, and shows the strong dependency of the test solutions on the nature of the architecture. All of these will be demonstrated using a design that is designed for computationin-memory bit-wise logical operations.

show abstract

“…Memristor-based Computation-In-Memory (CIM) concept was proposed to eliminate the communication between the CPU and memory by leveraging memristors for both storage and computation in the same physical crossbar [3,12,13]. Here, we use the CIM to realize an accelerator we refer to as Memristive Vector Processor (MVP).…”

Section: Memristive Devices For Vector Processingmentioning

confidence: 99%

Memristive devices for computation-in-memory

Nguyen

Xie

et al. 2018

2018 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

Self Cite

View full text Add to dashboard Cite

CMOS technology and its continuous scaling have made electronics and computers accessible and affordable for almost everyone on the globe; in addition, they have enabled the solutions of a wide range of societal problems and applications. Today, however, both the technology and the computer architectures are facing severe challenges/walls making them incapable of providing the demanded computing power with tight constraints. This motivates the need for the exploration of novel architectures based on new device technologies; not only to sustain the financial benefit of technology scaling, but also to develop solutions for extremely demanding emerging applications. This paper presents two computation-in-memory based accelerators making use of emerging memristive devices; they are Memristive Vector Processor and RRAM Automata Processor. The preliminary results of these two accelerators show significant improvement in terms of latency, energy and area as compared to today's architectures and design.

show abstract

Memristive devices for computing: Beyond CMOS and beyond von Neumann

Cited by 46 publications

References 53 publications

Effects of memristive synapse radiation interactions on learning in spiking neural networks

Effects of memristive synapse radiation interactions on learning in spiking neural networks

Testing Computation-in-Memory Architectures Based on Emerging Memories

Memristive devices for computation-in-memory

Contact Info

Product

Resources

About