Memristor based memories: Technology, design and test

Hamdioui, Said; Aziza, Hassen; Sirakoulis, Georgios Ch.

doi:10.1109/dtis.2014.6850647

Cited by 48 publications

(21 citation statements)

References 41 publications

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“…The most commonly used memory select devices are (NOR Flash) [2]. On the other hand, a typical passive crossbar memory where no rectifying devices are used to isolate the cells being written or read [12,13], suffers from large amount of leakage current flowing through unselected cells called current sneak paths; this reduces both the size and the reliability (noise margin) of the memory [14][15][16]. Many solutions have been proposed to overcome or diminish this drawback.…”

Section: Introductionmentioning

confidence: 99%

Memristive Crossbar-Based Nonvolatile Memory

Vourkas

Sirakoulis

2015

Emergence, Complexity and Computation

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Section: Introductionmentioning

confidence: 99%

Memristive Crossbar-Based Nonvolatile Memory

Vourkas

Sirakoulis

2015

Emergence, Complexity and Computation

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“…A memristor memory with 1T1R cells can eliminate the sneak-path current and bipolar memristor can be used. However, it is challenging to provide high current levels with both polarities [9].…”

Section: Introductionmentioning

confidence: 99%

Fault modeling and testing of 1T1R memristor memories

Chen

2015

2015 IEEE 33rd VLSI Test Symposium (VTS)

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Memristor memory has attracted more attentions to act as one of future non-volatile memories. One access transistor and one memristor (1T1R) cell structure can be used to eliminate the issue of sneak path current of memristor memories with crossbar structure. In this paper, we propose several fault models for 1T1R memristor memories based on electrical defects, such as resistive bridge between two nodes, transistor stuck-on and stuckopen faults. In comparison with existing faults, two new faults, write disturbance fault (W DF ) and dynamic write disturbance fault (dW DF ), are found. In addition, a March test is proposed to cover the defined faults. The March test requires (1+2a+2b)N write operations and 5N read operations for an N -bit memristor memory, where a and b are the number of consecutive Write-1 and Write-0 operations for activating a dW DF .Index Terms-Non-volatile memory, memristor, resistive memory, test.

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“…In fact, Flash memory is approaching fundamental scaling limits due to several reliability issues. Therefore, currently there is a growing interest in new devices for information processing and memory, as well as new technologies and paradigms for system architecture [2][3][4][5][6][7][8][9]. An exciting approach would be the development of a competitive, reliable, multi-level storage cell technology, which will enable storing multiple bits of information in a single memory element [10,11].…”

mentioning

confidence: 99%

High-Radix Arithmetic-Logic Unit (ALU) Based on Memristors

Vourkas

Sirakoulis

2015

Emergence, Complexity and Computation

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It is well-known that faster arithmetic operations could be achieved via high-radix numeric systems [1]. However, due to the absence of appropriate storage devices, such a practice was not given much attention so far because it would require memory capacity doubling in order to represent high-radix numbers in binary mode. Moreover, in view of the prospected end of the so called "Moore's law", many new approaches, which aim to extend the applicability of Complementary Metal-Oxide-Semiconductor (CMOS)-based circuits and systems, have been proposed by the semiconductor industry. In fact, Flash memory is approaching fundamental scaling limits due to several reliability issues. Therefore, currently there is a growing interest in new devices for information processing and memory, as well as new technologies and paradigms for system architecture [2][3][4][5][6][7][8][9]. An exciting approach would be the development of a competitive, reliable, multi-level storage cell technology, which will enable storing multiple bits of information in a single memory element [10,11]. Most such approaches so far are based on transistors [2], but the recent discovery of the memristor has renewed the interest for this promising scientific area [12][13][14]. Owing to their analog nature, memristors have a remarkable ability to store multi-bit values in a single cell [15,16]; a property which adds significantly to their potential use in future multi-level storage cell technologies and high-radix arithmetic units [17].Nowadays, there is a notable variety of systems that exhibit memristive behavior [18]. As it was also mentioned in the previous chapters, memristors offer several advantages, such as nonvolatility, rapid switching, low power consumption, and compatibility with conventional CMOS technology. Additionally, they provide an unconventional computation framework, which combines information processing and storage in the memory cell itself; the major distinction from the present computing paradigms [19,20]. Such favorable performance characteristics render them a candidate technology, able to bring the next technological revolution in electronics,

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Memristor based memories: Technology, design and test

Cited by 48 publications

References 41 publications

Memristive Crossbar-Based Nonvolatile Memory

Memristive Crossbar-Based Nonvolatile Memory

Fault modeling and testing of 1T1R memristor memories

High-Radix Arithmetic-Logic Unit (ALU) Based on Memristors

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