Memristor Multiport Readout: A Closed-Form Solution for Sneak Paths

Abstract

Abstract-In this paper, we introduce for the first time, a closedform solution for the memristor-based memory sneak paths without using any gating elements. The introduced technique fully eliminates the effect of sneak paths by reading the stored data using multiple access points and evaluating a simple addition/subtraction on the different readings. The new method requires fewer reading steps compared to previously reported techniques, and has a very small impact on the memory density. To verify the underlying theory, the proposed system is simulated using Synopsys HSPICE showing the ability to achieve a 100% sneak-path error-free memory. In addition, the effect of quantization bits on the system performance is studied.

Practical Determination of Individual Element Resistive States in Selectorless RRAM Arrays

“…In order to simplify the tangled structure of the crossbar network, read-out operations are typically performed with all inactive word-lines shorted together and similarly all inactive bitlines shorted together. This reduces the crossbar network to a 'four-node-four-component' (4n4c) system where the four components are: 1) the target device alone (R T ), 2) the devices sharing word-line with the target (we shall call this the 'word complement' of R T ) with equivalent resistance R w , 3) the devices sharing bit-line with the target (the 'bit complement' of R T ) with equivalent resistance R b and 4) the rest of the array with equivalent resistance R r (see [9], [14]). Fig.…”

“…c) Short together and bias the active wordand bit-lines with the aim of shunting R T whilst determining the 'full complement', R wb = R w ||R b . The procedure yields three equations for three unknowns and hence R T can be computed, as shown in [14]. All read-outs are performed at the standard V b = 0.5 V .…”

“…Sneak currents can be mitigated in selectorless arrays too by e.g. employing suitable biasing regimes (for overview of such biasing regimes see section 2.6 in [13]) or attempting to calculate cross-point resistance via multiple, multi-port measurements [14]. Each mitigation/readout strategy has merits and drawbacks.…”

An FPGA-Based Instrument for En-Masse RRAM Characterization With ns Pulsing Resolution

“…As a result, cell read-out accuracy is reduced and write operations may disturb the memory state of adjacent devices, which is why strategies to mitigate sneak path effects are an area of active research. These include introducing CMOS [12], or emerging devices [13] as 'selector' elements to isolate the target device from the rest of the array, and the employment of active biasing of inactive WLs and BLs in order to divert sneak currents [10] amongst other techniques [14]. The second key advantage of RRAM concerns the potential for single-device, multi-level memory cells [2].…”

A <inline-formula> <tex-math notation="LaTeX">$\mu $ </tex-math></inline-formula>-Controller-Based System for Interfacing Selectorless RRAM Crossbar Arrays

“…One approach centers on multiport readout and subsequent mathematical cancellation of said sneak path currents [18]. Another, more conventional approach employs various schemes of active biasing of both active (leading to the target device) and inactive word and bitlines.…”