Metal Contamination Evaluation of Via-Last Cu TSV Process Using Notchless Si Etching and Wet Cleaning of the First Metal Layer

Watanabe, Naoya; Kikuchi, Hidekazu; Yanagisawa, Azusa; Shimamoto, H.; Kikuchi, Katsuya; Aoyagi, Masahiro; Nakamura, Akio

doi:10.1109/ectc.2017.144

Cited by 1 publication

(1 citation statement)

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“…The fabrication of 3D-stacked CMOS image sensors is achieved by 3D integration technology that enables the stacking of different kinds of circuit blocks, such as sensor, memory, and logic blocks, into one chip with mainly Cu through-silicon via (TSV) technology. However, the using of Cu TSV technology may cause Cu contamination during the TSV fabrication process and when the property of the barrier layer is insuffcient for preventing Cu diffusion [ 4 , 5 ]. In addition, during the fabrication of BSI-based 3D stacked CMOS image sensors, the device Si wafer must be thinned by mechanical grinding and chemical mechanical polishing (CMP).…”

Section: Introductionmentioning

confidence: 99%

Reduction of Dark Current in CMOS Image Sensor Pixels Using Hydrocarbon-Molecular-Ion-Implanted Double Epitaxial Si Wafers

Onaka‐Masada

Kadono

Okuyama

et al. 2020

Sensors

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The impact of hydrocarbon-molecular (C3H6)-ion implantation in an epitaxial layer, which has low oxygen concentration, on the dark characteristics of complementary metal-oxide-semiconductor (CMOS) image sensor pixels was investigated by dark current spectroscopy. It was demonstrated that white spot defects of CMOS image sensor pixels when using a double epitaxial silicon wafer with C3H6-ion implanted in the first epitaxial layer were 40% lower than that when using an epitaxial silicon wafer with C3H6-ion implanted in the Czochralski-grown silicon substrate. This considerable reduction in white spot defects on the C3H6-ion-implanted double epitaxial silicon wafer may be due to the high gettering capability for metallic contamination during the device fabrication process and the suppression effects of oxygen diffusion into the device active layer. In addition, the defects with low internal oxygen concentration were observed in the C3H6-ion-implanted region of the double epitaxial silicon wafer after the device fabrication process. We found that the formation of defects with low internal oxygen concentration is a phenomenon specific to the C3H6-ion-implanted double epitaxial wafer. This finding suggests that the oxygen concentration in the defects being low is a factor in the high gettering capability for metallic impurities, and those defects are considered to directly contribute to the reduction in white spot defects in CMOS image sensor pixels.

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Section: Introductionmentioning

confidence: 99%