Method for a Constant Loop Bandwidth in LC-VCO PLL Frequency Synthesizers

Abstract

An LC-VCO based phase-locked loop (PLL) frequency synthesizer which incorporates loop bandwidth tracking is described. In order to minimize loop bandwidth variations resulting from changes in the LC-VCO gain, the proposed PLL employs an averaging varactor based split-tuned LC-VCO and a servo loop which sets the charge-pump current to be inversely proportional to the square of the oscillation frequency. The combination of these techniques maintains a constant loop bandwidth over a wide range of operating frequencies. Fabricated in a 0.13 m CMOS technology, the prototype chip measures less than 4% variation in VCO CP (equivalent to the variation in PLL loop bandwidth) for an operating frequency range of 3.1 to 3.9 GHz. Index Terms-Bandwidth tracking, frequency synthesizer, LC-VCO, loop bandwidth, phase-locked loop (PLL).

Linear frequency tuning in an LC-resonant system using a C–V response controllable MEMS varactor

“…For example, the linearity of the output frequency sweep is directly connected to the range accuracy of the frequency modulation continuous wave (FMCW) radar system [1]. In phase-locked loop circuits, it is known that the nonlinear frequency tuning characteristic in a VCO is one of the main sources affecting phase noise degradation [2].…”

Design of 4GHz CMOS Charge-pump Phased-locked Loop based on the Simulink Behavioral Simulation

“…The outputs of the phase frequency detector and the charge pump are filtered by a low-pass filter to directly control the voltage-controlled oscillator.The divider in the feedback branch divides the output signal of the VCO which is compared with the reference signal (fref) through the phase frequency detector. In the integer frequency synthesizer, N is an integer [4] . In the phase-locked loop design, the loop bandwidth is usually much smaller than the reference frequency.…”

A wideband LC-VCO with small VCO-gain fluctuation for mobile DTV application

“…The large fluctuation of K vco will degrade the performance of PLL: Firstly the closed loop bandwidth of PLL will vary significantly over the tuning range, thus a programmable charge-pump is usually needed to compensate for the loop gain change with frequency [4]; Secondly the larger is the K vco , the more sensitive is the phase noise of PLL to the noise on the tuning line; Finally the switched capacitor array needs a calibration process to select a right sub-band before closed phase loop operation [5], if K vco is too low, the calibration time becomes long.…”