MFMox ferroelectric memory transistor

Abstract

Ferroelectric memory transistor is known for poor charge retention time. An alternative device structure has been developed to solve the retention problem of ferroelectric memory transistors. The gate structure of the new ferroelectric memory transistor is metal on ferroelectric thin film on bottom electrode on n-type semiconductive metal oxide on p-type silicon. The bottom electrode is in direct contact to the semiconductive metal oxide. Therefore, there is no floating gate in this device. The threshold voltage memory window of an experimental device extrapolation from 4 days of measured data to 10 years is about 1V. Index Terms-Ferroelectric, MFMox, Non-volatile MemoryTransistor 0-7803-8726-0