Micro-ring resonator based all-optical Arithmetic and Logical Unit

Jadhav, Nathrao B.; Bhagat, Rajas; Paranjpe, Sanika; Dahitule, Saurabh; Madke, Siddhi; Jadhav, Savitri

doi:10.1016/j.ijleo.2021.167622

Cited by 10 publications

(5 citation statements)

References 23 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…14. 154 There have been several attempts utilizing to realize AO-ALU using SOA 155 and TOAD; 156 however, they possessed disadvantages such bulky dimensions and lack of integration capability for photonic integrated circuits (PICs).…”

Section: Ao-combinational Circuitsmentioning

confidence: 99%

See 1 more Smart Citation

Review on all-optical logic gates: design techniques and classifications – heading toward high-speed optical integrated circuits

Anagha

Jeyachitra

2022

Opt. Eng.

View full text Add to dashboard Cite

All-optical logic gates (AO-LGs) are the key elements that play a pivotal role in the development of future all-optical networks and all-optical computing. A complete overview of the seven all-optical logic gates (i.e., AND, OR, NOT, XOR, XNOR, NAND, and NOR) based on their design techniques and applications are covered, including the latest technologies, such as topological photonics and artificial intelligence-based designs techniques. In addition, we have further categorized the AO-LGs as reconfigurable gates, simultaneous gates, reversible gates, modulation-based gates, and data rate-based gates. The techniques to implement these different classes of gates are reviewed and their limitations are discussed. We also discuss in brief the various simulation tools used to design and analyze the AO-LGs. Finally, the most feasible techniques for constructing optical integrated circuits based on the existing fabrication technologies and available resources are explored, and future prospects are outlined.

show abstract

Section: Ao-combinational Circuitsmentioning

confidence: 99%

“…14 Design of AO-ALU using MRRs. 154 propagating in the plasmonic waveguides. 163 A 3-bit integrated AO-parity generator and checker circuit were realized using SOA-MZI-based optical tree architecture at 10 Gbps.…”

Section: Ao-combinational Circuitsmentioning

confidence: 99%

Review on all-optical logic gates: design techniques and classifications – heading toward high-speed optical integrated circuits

Anagha

Jeyachitra

2022

Opt. Eng.

View full text Add to dashboard Cite

show abstract

“…MRRs were preferred because the signal is carried in the form of photons only and it also has several advantages like miniaturized ring dimensions, lesser complex circuit, has narrow band, has high wavelength selectivity, and large free spectral range. Using MRRs a number of logic circuits like universal logic gates 1,[9][10][11] , combinational circuits like sequence generator 12 , multiplexer 13,14 , comparators 15 and sequential circuits like flip-flops 16 , counters 17,18 , reversible logic gates 19,20 , ALU reconfigurable logic operations 21 , etc. have been devised.…”

Section: Introductionmentioning

confidence: 99%

Modelling of all optical synchronous up-counter using microring resonator

Sharma,

Choure,

Saharia

et al. 2023

Nanophotonics and Micro/Nano Optics IX

View full text Add to dashboard Cite

“…The busbased on-chip communication has been replaced by electrical networks-on-chip (ENoC) as a substitute which has improved the communication bandwidth of MPSoCs [2]. However, ENoCs cannot gratify the bandwidth, latency and loss requirements within the available power budget of optical integrated circuits because of its restricted bandwidth, extended delay, and reasonably high power consumption [3][4]. On-chip optical interconnects have appeared as a concrete alternative to the ENoCs.…”

Section: Introductionmentioning

confidence: 99%

Optimized 6x6 Optical Router for Three Dimensional Optical Networks-on-Chip

Jadhav¹,

Chaudhari²

2022

J. Phys.: Conf. Ser.

Self Cite

View full text Add to dashboard Cite

The interconnection network is very influential in Multiprocessor system-on-chip (MPSoC) performance. Due to low power efficiency and high latency, conventional interconnects are replaced by electrical networks on-chip (ENoC). However, ENoCs cannot gratify the bandwidth, latency and loss requirements within the available power budget of optical integrated circuits. The reasons being restricted bandwidth, extended delay, and reasonably high power consumption. So, ENoC are being replaced by optical networks-on-chip (ONoC). ONoC has emerged as a promising substitute to provide greater bandwidth, low latency and low power ingestion in MPSoCs. Number of cores required on-chip is increasing which leads to demand of multilayer multi-core processors. Three dimensional (3D) ONoC has become essential for such multilayer multi-core processors. For 3D ONoC, in this paper we have proposed 6x6 non-blocking optical router using micro-ring resonator (MRR) with less number of waveguide crossings and waveguide bendings. Phoenix software is used to simulate proposed optical router. Insertion loss of proposed optical router is lowest among existing non-blocking optical routers of 3D ONoC.

show abstract

Micro-ring resonator based all-optical Arithmetic and Logical Unit

Cited by 10 publications

References 23 publications

Review on all-optical logic gates: design techniques and classifications – heading toward high-speed optical integrated circuits

Review on all-optical logic gates: design techniques and classifications – heading toward high-speed optical integrated circuits

Modelling of all optical synchronous up-counter using microring resonator

Optimized 6x6 Optical Router for Three Dimensional Optical Networks-on-Chip

Contact Info

Product

Resources

About