Microprocessor Frequency Control Method Under Thermal and Energy Savings Constraints

Frankiewicz, Maciej; Kos, Andrzej

doi:10.1109/tcpmt.2015.2496876

Cited by 6 publications

(5 citation statements)

References 8 publications

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“…To control the temperature of chips, embedded systems usually use dynamic thermal management (DTM) techniques. These techniques usually try to adjust the processor voltage and frequency to control power consumption and temperature [3]- [5]. Many thermal management techniques have been proposed for modern chips due to increased power densities and reliability implications.…”

Section: Introductionmentioning

confidence: 99%

Temperature and performance evaluation of multiprocessors chips by optimal control method

2023

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Multi-core processors support all modern electronic devices nowadays. However, temperature and performance management are one of the most critical issues in the design of today’s microprocessors. In this paper, we propose a framework by using an optimal control method based on fan speed and frequency control of the multi-core processor. The goal is to optimize performance and at the same time avoid violating an expected temperature. Our proposed method uses a high-precision thermal and power model for multi-core processors. This method is validated on asymmetric ODROID-XU4 multi-core processor. The experimental results show the ability of the proposed method to achieve the adequate trade-off between performance and temperature control.

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Section: Introductionmentioning

confidence: 99%

Temperature and performance evaluation of multiprocessors chips by optimal control method

2023

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“…Nevertheless, as long as we use data processing by means of electron devices, we have to consider energy losses. Due to the high power dissipations in present-day electronics, cooling and temperature management are and will be an important topic [2][3][4][5][6][7][8][9][10][11][12][13]. Although fan cooling is the most widely used, other alternatives such as natural convection, liquid cooling, heat pipes, new materials, Peltier heat pumps, harvesting, etc.…”

Section: Introductionmentioning

confidence: 99%

“…The problem seems to be crucial, especially from two points of view: how to achieve a minimum chip temperature and to obtain maximum device throughput. The throughput improvement in the thermal aspect has been criticised by many authors [3,4,7,9,15,26].…”

Section: Introductionmentioning

confidence: 99%

Optimal Temperature Regulation of Integrated Circuits with Peltier Heat Pumps

2022

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A thermal network will be presented to model a multi-layer structure consisting of a semiconductor structure, integrated Peltier heat pump and a cooling fin. A criterion will be set up to determine the optimal Peltier current to minimise the chip temperature using the power dissipation as the control parameter. Compared with classical methods, the proposed solution does not show any time delays in response to power changes and is not sensitive to the position of chip temperature sensors. It does not generate chip temperature oscillations. The idea can be applied in each integrated circuit cooled with Peltier heat pumps, e.g., power devices, high-performance processors, high-frequency integrated circuits, etc. The authors present a simple mathematical formula that can be easily implemented in the software of a processor being cooled. As a consequence, the device is able to operate with maximum efficiency assuming required reliability. Theoretical considerations are illustrated by some results of computations. The paper is addressed to designers involved in the creation of devices dissipating a significant amount of heat energy.

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“…The extra instructions are realized with higher transistor density, which means higher power consumption despite the fact, that each transistor has lower operating voltage to achieve fewer thermal losses. It could result in overheating problems, especially with higher operating frequencies and smaller dimensions, which should be considered during system design [5].…”

Section: Introductionmentioning

confidence: 99%

Instruction mapping techniques for processors with very long instruction word architectures

Mego

Fryza

2022

Journal of Electrical Engineering

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This paper presents an instruction mapping technique for generating a low-level assembly code for digital signal processing algorithms. This technique helps developers to implement retargetable kernel functions with the performance benefits of the low-level assembly languages. The approach is aimed at exceptionally long instruction word (VLIW) architectures, which benefits the most from the proposed method. Mapped algorithms are described by the signal-flow graphs, which are used to find possible parallel operations. The algorithm is converted into low-level code and mapped to the target architecture. This process also introduces the optimization of instruction mapping priority, which leads to the more effective code. The technique was verified on selected kernels, compared to the common programming methods, and proved that it is suitable for VLIW architectures and for portability to other systems.

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Microprocessor Frequency Control Method Under Thermal and Energy Savings Constraints

Cited by 6 publications

References 8 publications

Temperature and performance evaluation of multiprocessors chips by optimal control method

Temperature and performance evaluation of multiprocessors chips by optimal control method

Optimal Temperature Regulation of Integrated Circuits with Peltier Heat Pumps

Instruction mapping techniques for processors with very long instruction word architectures

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