Microvia Filling with Nickel-Tungsten Alloy to Decrease the Coefficient of Thermal Expansion of Electronic Circuit Interconnections

Abstract

A nickel-tungsten alloy plating formula was developed to electrochemically fill the microvias of printed circuit boards and the through-silicon vias (TSVs) of wafers. The plating solution was composed of Ni(SO 3 NH 2 ) 2 , citric acid, sodium citrate, Na 2 WO 4 , chloride ions, and 2-mercapto-5-benzimidazolesulfonic acid. A void-free Ni-W superfilling of a microvia and a TSV were achieved. The tungsten content in the filled alloy varied from 1.5 atom% to 5.5 atom%, depending on the plating temperature. The coefficient of thermal expansion of the filled Ni-W was theoretically calculated according the tungsten content, which was lower than that of copper. Microvia filling by copper electroplating has been widely employed to fabricate state-of-the-art printed circuit boards (PCBs) for interconnection, especially for integrated circuit (IC) packaging substrates.1-5 Recently, through-silicon vias (TSVs) have also been metallized by copper electroplating for the interconnection of threedimensional (3D) IC chip stacking packaging. [6][7][8][9][10][11][12][13] Copper is a good conductor but its coefficient of thermal expansion (CTE) is high. Therefore, issues related to CTE mismatch between the conducting materials and the dielectric materials arise in PCB and 3D packaging with high-density interconnections.Numerous authors have reported that the high CTE of the copper filled in the TSVs results in stress impacts on silicon substrates. [14][15][16][17] Copper atoms diffuse from the TSV due to thermal cycling, leading to void formation in the TSV. 18,19 The copper protrusion on the TSV caused respectively by thermal expansion and diffusion of copper lattices and atoms may destroy stacked IC chips. [20][21][22] Copper must be replaced by tungsten 23 or nickel 24,25 to overcome the issue of CTE mismatch.Although the CTE of tungsten is very low, 14,26 it cannot be electrochemically plated in an aqueous electrolyte. Fortunately, tungsten can be induced to co-deposit with nickel. [27][28][29][30][31][32] In this work, a Ni-W alloy plating formula that can achieve Ni-W bottom-up filling of microvia was developed. This plating formula can fill the microvia of PCBs and can also fill TSVs. The Ni-W filled TSVs exhibit good thermal stability after being annealed at 500• C for 4 h. ExperimentalThe dimensions of the PCB fragments cut for the Ni-W filling plating were 4.2 × 6.0 cm 2 . The microvias were formed by CO 2 laser ablation. The diameter and depth of the microvias were 80 μm and 40 μm, respectively. The sidewalls of the microvias were metallized by electroless copper plating in advance to deposit a 2-3 μm thick layer of copper before the filling plating.TSVs were formed by a deep reactive ion etching (DRIE) process (i.e., the Bosch process). The thickness of the isolation layer (i.e., SiO 2 ) in the TSVs formed by thermal oxidation was approximately 1-3 × 10 3 Å. The barrier layer was a TiN film with a thickness of 500 Å, which was conformably deposited by atomic layer deposition (ALD) for 600 cycles. The seed layer was depo...

Low Thermal Expansion Coefficient Electrodeposited Copper and Its Contraction Mechanism by Annealing

“…Another solution to overcome the TEC problems is using low TEC metals and/or alloys to replace the copper. [6][7][8][9] However, the resistivity of these metals and alloys is higher than that of copper, and furthermore, etching is impossible. For example, Y.-T. Lin applied a Ni-W plating formula for filling the TSVs.…”

“…The Ni-W alloy showed a lower TEC value (approximately 14 × 10 −6 (1/ • C) as compared to the TEC of copper. These Ni-W filled TSVs exhibited good thermal stabilities after being annealed at 500 • C for 4 h. 6 M.-H. Roh tried to suppress the extrusion of copper out of TSV by using Cu-W alloys. The results showed that the thermal expansion coefficient of Cu-7.6%wt W was only 10.8 × 10 −6 (1/ • C).…”

Superconformal Bottom-up Cobalt Deposition in High Aspect Ratio through Silicon Vias

“…Both electroanalytical measurements and the geometry of feature filling indicate the S-NDR mechanism. This paper uses polyethyleneimine (PEI) for filling of much larger TSVs because it enables localized, superconformal filling of TSVs (9) and microcracks (13,14) with ferrous metals including Ni and Ni-alloys (15). It shows a subset of experimental results from a study that follows the path of the Ni study, including electroanalytical measurements and Co deposition in TSVs using a CoSO 4 + CoCl 2 + H 3 BO 3 electrolyte with the branched PEI suppressor.…”

The Suppression Induced S-NDR Mechanism for Defect-Free Filling of High Aspect Ratio Features

“…In larger features in particular, suppressor containing electrolytes that exhibit suppressor induced critical behavior (i.e., S-shaped Negative Differential Resistance, S-NDR) have been used to obtain bottom-up Cu filling of TSVs (1)(2)(3)(4). Suppressor-containing electrolytes exhibiting S-NDR have also been used to obtain localized, superconformal filling of features with Ni and Ni alloys (5)(6)(7)(8), Au (9) and Zn (10). Two types of filling evolution are observed, with complete bottom-up deposition and TSV filling achieved at a single potential with Cu (1) that contrasts with a passive-active transition at a distance down the filling feature, the position dictated by the applied potential and the suppressor concentration, exhibited by Au (9) and Ni (8).…”