former is 0.69. The area of the transformer is very small (35 ϫ 45 m 2 ).
EXPERIMENTAL RESULTSThe V-band ILFD was fabricated in TSMC 0.18 m CMOS technology and the chip photo is shown in Figure 3. The die size is only 0.52 ϫ 0.62 mm 2 . The outputs of ILFD are amplified by two open drain buffer amplifiers which the DC power supplies are injected by two external bias-Tees. The measurement is performed via on-wafer probing with Agilent TM signal source generator E8257DA and spectrum analyzer E4448A.The DC power dissipation of divider core and buffer amplifier consumes a current of 3 and 3.85 mA from a 1 V supply, respectively. Figure 4 shows the output spectrum of the fabricated divider with input frequency of 60 GHz. As can be seen, the second harmonic is Ϫ18.5 dB below the fundamental frequency. Figure 5 depicts the tuning characteristics and output power of the 20 GHz oscillator in free-run. The VCO operates from 18.95 to 21.77 GHz with 13.85% tuning range. The output power of the VCO is within Ϫ9.42 Ϯ 1 dBm. Figure 6 plots the locking range with respect to the tuning voltage and injection power. The locking range is 1.75 GHz with injection power of 5 dBm at V tune of 1.8 V. Figure 7 shows the sensitivity of the proposed ILFD. The total tuning range of divider is from 56.5 to 66.4 GHz with 9.9 GHz locking range while varying the tuning voltage V tune from 0 to 1.8 V under the injection power of 5 dBm. Table 1 summarizes the overall performance of the recent ILFD designs. A figure-of-merit (FoM) defined by the ratio of maximum frequency and power dissipation is suggested for a fair comparison. As surveyed from this benchmark, the proposed ILFD achieves the highest FoM among the cited papers [2,4, 8, 9]. Note that this V-band ILFD is implemented in standard 0.18 m CMOS technology.
CONCLUSIONThis article proposed a transformer-coupled injection ILFD to overcome the technology limitation. The divide-by-3 60 GHz ILFD has been successfully developed in TSMC 0.18 m CMOS technology. The measured overall locking range is from 56.5 to 66.4 GHz and only consumes a DC power of 3 mW. For the author's best knowledge, this frequency divider operates at much higher frequency with wider locking range and lower power consumption compared with other literature fabricated in 0.18 m CMOS technology.
ACKNOWLEDGMENT