Microwave Noise Modeling of CMOS Transistors

Abstract

In this paper we systematically develop an understanding of the noise behavior within MOS devices operating at microwave frequencies. A bottom to top approach is taken to accomplish this -device physics to network modeling to device layout. Our hope is that the results within this paper will provide RF CMOS circuit designers with a better understanding of the noise properties of MOS devices as well as to help them design better low noise amplifiers and mixers.