Millimeter-wave hetero-integrated sources in InP-on-BiCMOS technology

Abstract

The paper presents millimeter-wave (mm-wave) signal sources using a hetero-integrated InP-on-BiCMOS semiconductor technology. Mm-wave signal sources feature fundamental frequency voltage-controlled oscillators (VCOs) in BiCMOS, which drive frequency multiplier–amplifier chains in transferred-substrate (TS) InP-DHBT technology, heterogeneously integrated on top of the BiCMOS wafer in a wafer-level bonding process. Both circuits are biased through a single set of bias pads and compact low-loss transitions from BiCMOS to InP circuits and vice versa have been developed, which allows seamless signal routing through both technologies exhibiting 0.5 dB insertion loss up to 200 GHz. One VCO operates at 82 GHz with a tuning range of 600 MHz and an output power of approximately 8 dBm. A frequency doubler combined with this VCO circuit delivers 0 dBm at 164 GHz and a frequency tripler with a similar VCO delivers −10 dBm at 246 GHz. Another hetero-integrated W-band doubler–amplifier circuit demonstrates 12.9 dBm saturated output power with 5.9 dB conversion gain at 96 GHz. A direct comparison of the TS InP-DHBT MMIC with either silicon or traditional AlN carrier substrates shows the favorable properties of the hetero-integrated process discussed here. The results demonstrate the feasibility of hetero-integrated circuits operating well above 100 GHz.

SciFab -a wafer-level heterointegrated InP DHBT/SiGe BiCMOS foundry process for mm-wave applications

“…Multiplication ratios of 2, 3, and 4 were implemented. With a VCO frequency of 82 GHz, sources at 164, 246, and 328 GHz were fabricated . The quadrupler included a balun within the InP module, which operated well in the first design pass, followed by a differential InP DHBT buffer amplifier stage.…”

A review of InP/InAlAs/InGaAs based transistors for high frequency applications

“…The basic requirements of HBTs are high gain, higher break down voltage and very high collector current density in order to generate high output power at high power efficiency under class A & B operations. To increase the power performance several optimizations such as decreasing the collector doping and reducing the parasitic resistance can be made to increase the break down voltage and to reduce the knee voltage [173]. Over the last ten years, techniques to aggressively scale InP HBTs to sub-micrometer features vertically and laterally have resulted in record performance for f t and f max .…”

On-wafer small-signal and large-signal measurements up to sub-THz frequencies

“…COSMOS [5], [6], or SciFab [7]- [10]. The major driving force is to provide high-speed III-V semiconductor devices on Si platforms, providing not only speed improvement without trade-off in signal amplitude, but also functional complexity to high-speed circuits.…”

“…Top-level pads are on metal level G2 [9]. It has been shown in [10] that device small-signal and large-signal performance of the BiCMOS and InP HBT devices, respectively, remains essentially unaffected by the hetero-integration InP-on-BiCMOS process. Small-signal measurements provided in Fig.…”

“…Cyan and blue lines are results for the standard TS process, red and magenta are results for InP HBT transistors in InP-on-BiCMOS process. Insets show the transistor layout for the two cases, respectively [10].…”