A CMOS linear PA for IEEE 802.11 b/g applications is implemented in a 0.13 μm process including all matching networks. An adaptive power cell (APC) scheme is proposed to achieve high linear output power and efficiency and applied to the PA, which delivers the output power of 20.5 (19.5) dBm with the PAE of 20.2(17.5)% for an 802.11g modulated signal with the EVMs at -25(-28) dB. Index Terms -AM to AM, AM to PM, CMOS Power Amplifier (PA), adaptive, error vector magnitude (EVM), linearization, IMD3, WLAN, 802.11 b/g