Minimizing accumulative memory load cost on multi-core DSPs with multi-level memory

RT-ROS: A real-time ROS architecture on multi-core processors

“…For example, the angular velocity or electric current based method can be adopted to get a more accurate synchronous motion control. Moreover, many emerging memory and storage techniques have been proposed [28][29][30][31][32][33][34][35][36][37][38][39][40][41][42][43][44][45][46][47]. We will study how to utilize them to further optimize the performance of RT-ROS.…”