Missing a trick: Karatsuba variations

Scott, Michael

doi:10.1007/s12095-017-0217-x

Cited by 8 publications

(14 citation statements)

References 6 publications

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“…In [29], Scott proposed a Karatsuba variant based on Arbitrary degree Karatsuba (ADK) previously suggested in [30]. Scott implemented the ADK approach in the reducedradix setting, where a number is represented using a word size lower than the one belonging to the target processor.…”

Section: Comparison Against Scott's Karatsuba Variantmentioning

confidence: 99%

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Implementation of RSA Signatures on GPU and CPU Architectures

et al. 2020

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This paper reports a constant-time CPU and GPU software implementation of the RSA exponentiation by using algorithms that offer a first-line defense against timing and cache attacks. In the case of GPU platforms the modular arithmetic layer was implemented using the Residue Number System (RNS) representation. We also present a CPU implementation of an RNS-based arithmetic that takes advantage of the parallelism provided by the Advanced Vector Extensions 2 (AVX2) instructions. Moreover, we carefully analyze the performance of two popular RNS modular reduction algorithms when implemented on many-and multi-core platforms. In the case of CPU platforms we also report that a combination of the schoolbook and Karatsuba algorithms for integer multiplication along with Montgomery reduction, yields our fastest modular multiplication procedure. In comparison with previous literature, our software library achieves faster timings for the computation of the RSA exponentiation using 1024-, 2048-and 3072-bit private keys.

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Section: Comparison Against Scott's Karatsuba Variantmentioning

confidence: 99%

“…We implemented Scott's strategy using a word size of r = 2 62 bits as proposed in [29]. A comparison of our own implementation of Scott's proposal against the combination of Karatsuba and the schoolbook methods is presented in Table 2.…”

Section: Comparison Against Scott's Karatsuba Variantmentioning

confidence: 99%

Implementation of RSA Signatures on GPU and CPU Architectures

et al. 2020

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“…But things are not so simple and easy. Indeed, there are many challenges among which correctness, called numerical stability in [33], comes first due to the overflow on 32-bit platforms. The number of limbs on 32-bit platforms is a multiple of both 2 and 3 which opens the way for two-and three-way decomposition.…”

Section: Tablesmentioning

confidence: 99%

“…As pointed out by Scott in [33], to ensure numerical stability on 32-bit computers the reduced-radix representation is useful when the limbs size are at most 29-bit.…”

Section: Residue Multiplication Using Tmvpmentioning

confidence: 99%

Faster Residue Multiplication Modulo 521-bit Mersenne Prime and an Application to ECC

Ali

Cenk

2018

IEEE Trans. Circuits Syst. I

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, 94 pages We present faster algorithms for the residue multiplication modulo 521-bit Mersenne prime on 32and 64-bit platforms by using Toeplitz Matrix-Vector Product (TMVP). The total arithmetic cost of our proposed algorithms is less than the existing algorithms and we select the ones, 32and 64-bit residue multiplication, with the best timing results on our testing machine(s). For the 64-bit residue multiplication we have presented three versions of our algorithm along with their arithmetic cost and from implementation point of view, we provide the timing results of each version. The transition from 64to 32-bit residue multiplication is full of challenges because the number of limbs becomes double and the bitlength of the limbs reduces by half. We propose three technique for 32-bit residue multiplication such that both the arithmetic cost and the timing results of each one is provided. Without use of any intrinsics and SIMD/assembly instructions in our implementation, on Intel(R) Core i5 − 6402P CPU @ 2.80GHz, we find 136and 550-cycle for our 64and 32-bit residue multiplications, respectively. We implement constant-time variable-and fixed-base scalar multiplication on the standard NIST curve P-521 and Edwards curve E-521. Using our residue multiplication(s), we find E-521 more efficient than P-521 especially for variable-base scalar multiplication.

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“…Algorithm 1 gives an algorithm for the subtractive Karatsuba multiplication and Algorithm 2 shows the corresponding algorithm for squaring. Recently, Scott [21] denoted that, for the Karatsuba algorithm to be competitive, the actual radix must be a few bits less than the word size in order to facilitate additions without carry processing and, at the same time, to support the ability to distinguish positive and negative numbers. However, this requires an arbitrary degree variant of Karatsuba (ADK) algorithm that allows a non-word size split.…”

Section: Karatsuba-ofman Algorithmmentioning

confidence: 99%

Multiprecision Multiplication on ARMv8

Liu

Järvinen

Liu

et al. 2017

2017 IEEE 24th Symposium on Computer Arithmetic (ARITH)

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Abstract-Multiplication of large integers is a fundamental operation for public key cryptography. In contemporary public key cryptography, the sizes of integers are typically from more than one hundred bits to even several thousands of bits. Because these sizes exceed the bit widths of all general-purpose processors, these multiplications must be performed with a multiprecision multiplication algorithm which splits the operation into multiple partial products and accumulation steps. To ensure efficiency, multiprecision multiplication algorithms must be designed with special care and optimized for the instruction sets of specific processors. Consequently, developing efficient multiprecision multiplication algorithms and optimizing them for specific platforms has been an active research topic. In this paper, we optimize multiprecision multiplication and squaring specifically for the 64-bit ARMv8 processors which are widely used, for example, in modern smart phones and tablets. We combine the subtractive Karatsuba algorithm, operand-scanning techniques (for multiplication) and sliding-block-doubling methods (for squaring) to accelerate the performance of the 256-bit multiprecision multiplication and squaring by 7.6 % and 7.0 % compared to the OpenSSL implementations. We focus particularly on the multiprecision multiplications that are required in elliptic curve cryptography. Our implementation supports general elliptic curves of various sizes and all source codes are available in public domain.

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Missing a trick: Karatsuba variations

Cited by 8 publications

References 6 publications

Implementation of RSA Signatures on GPU and CPU Architectures

Implementation of RSA Signatures on GPU and CPU Architectures

Faster Residue Multiplication Modulo 521-bit Mersenne Prime and an Application to ECC

Multiprecision Multiplication on ARMv8

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