Mitigating Drain Source Voltage Oscillation for SiC Power MOSFETs in order to reduce Electromagnetic Interference

Hofstetter, Patrick; Bakran, Mark-M.

doi:10.23919/epe.2019.8914884

Cited by 8 publications

(2 citation statements)

References 10 publications

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“…In Figure 10(b), it can be seen that the spectral content at the oscillation frequency of the semiconductor switching process shows the critical value in terms of EMI compliance. In literature, several gate control methods are investigated that allow the reduction of SiC MOSFET switching oscillation [12,13,19]. The proposed EMI criterion facilitates the performance evaluation and comparison between different gate control strategies.…”

Section: Emi Compliant Switching Process Optimizationmentioning

confidence: 99%

SiC MOSFET switching – Lower losses without increased EMI – A technique to evaluate and achieve this goal

Maier

Bakran

2021

The Journal of Engineering

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With increasing switching speed of new power semiconductors like the SiC MOSFET, special attention has to be paid on the electromagnetic interference and its limitations. In this work, an evaluation criterion is developed as an optimisation tool for maximum exploitation of conducted electromagnetic interference limit by optimizing the switching process of a SiC MOSFET. The switching losses of power semiconductors can be reduced by increasing their switching speed. Unfortunately, at the same time, the electromagnetic interference will increase due to higher voltage and current slopes and higher switching oscillations. The electromagnetic interference caused by the switching process can be reduced by decreasing the switching speed. This also reduces the switching oscillation but inevitably increases the switching losses. The electromagnetic interference criterion developed in this paper will help to identify the proper switching speed for minimum losses under compliance with switching process related electromagnetic interference. It can be used to evaluate the benefit of more advanced gate control methods that allow increasing the switching speed without increasing the switching oscillation amplitude. The proposed method will not replace the final electromagnetic interference testing, but it will help determine the proper gate control method for lowest possible switching losses without violating the electromagnetic interference restrictions in an early development state. Measurements show that the switching losses can be reduced by 75% with a proper gate control method, where the proposed method assures the compliance with the electromagnetic interference limit.

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Section: Emi Compliant Switching Process Optimizationmentioning

confidence: 99%

SiC MOSFET switching – Lower losses without increased EMI – A technique to evaluate and achieve this goal

Maier

Bakran

2021

The Journal of Engineering

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“…Some studies have demonstrated the surge current capabilities of body-PiN-diodes and built-in SBDs in SiC MOSFETs and their associated failure mechanisms. [16][17][18][19][20][21][22][23] The primary failure mechanism has been found to be heat generations from forward voltage drops with huge surge currents, which can cause to the source metal to melt and/or brake the silicon oxide layers. However, only a few papers have reported the surge current capabilities of SBDs embedded in SiC MOSFETs to the best of our knowledge.…”

Section: Introductionmentioning

confidence: 99%

Comparative study on short-circuit and surge current capabilities of 1.2 kV SiC SBD-embedded MOSFETs

Kashiwa

Takahashi²,

Kitamura³

et al. 2023

Jpn. J. Appl. Phys.

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This paper presents a comparative study on the short-circuit and surge current withstanding capabilities and the static and turn-on switching characteristics of commercial 1.2-kV SiC SBD-embedded MOSFETs. The results confirmed that MOSFETs with a larger SBD area ratio had higher leakage current through the SBD during short-circuit transients due to a higher electric field and lattice temperatures as high as roughly 1120 K at the SBD, which resulted in reduced short-circuit withstanding capabilities. It was also found that MOSFETs with a smaller SBD area ratio had reduced surge-current capabilities in embedded SBDs. We conclude that is not due to the small SBD area ratio but to a weak bipolar operation of the JBS rectifiers even in high current regions.

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Power Quality Issues in Traction Power Systems

Hanafy

Hebala

Hamad

2021

2021 22nd International Middle East Power Systems Conference (MEPCON)

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Mitigating Drain Source Voltage Oscillation for SiC Power MOSFETs in order to reduce Electromagnetic Interference

Cited by 8 publications

References 10 publications

SiC MOSFET switching – Lower losses without increased EMI – A technique to evaluate and achieve this goal

SiC MOSFET switching – Lower losses without increased EMI – A technique to evaluate and achieve this goal

Comparative study on short-circuit and surge current capabilities of 1.2 kV SiC SBD-embedded MOSFETs

Power Quality Issues in Traction Power Systems

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