Mitigating Nonlinear Effect of Memristive Synaptic Device for Neuromorphic Computing

Fu, Jingyan; Liao, Zhiheng; Gong, Na; Wang, Jinhui

doi:10.1109/jetcas.2019.2910749

Cited by 34 publications

(23 citation statements)

References 30 publications

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“…This could pose difficulties for implementation in neuromorphic hardware, as the change in conductance is not, as ideally would be, proportional to the number of input pulses. [ 39 ] This nonlinearity can most probably be counteracted by the application of different pulse intensities in the potentiation and depression tasks, even if this will severely complicate the driving electronics. At this point, it is essential to underline that the choice for 25 V pulses was initially based on literature reports, [ 23 ] where the pulse voltage was scaled to our dielectric thickness of 230 nm.…”

Section: Resultsmentioning

confidence: 99%

Synaptic Plasticity in Semiconducting Single‐Walled Carbon Nanotubes Transistors

Talsma

Loo

Shao

et al. 2020

Advanced Intelligent Systems

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Recently, a significant amount of attention went toward the development of artificial neural networks, as these promise efficient computation for specific tasks that are expensive or even impossible for von Neumann architecture‐based computers. A considerable amount of research is conducted to develop materials in which layered neural networks are easily implemented. Herein, the use of high‐quality semiconducting single‐walled carbon nanotube (s‐SWCNT) inks to fabricate artificial synapses using simple bottom‐gate field‐effect transistors (FETs) is reported. The synapse utilizes the otherwise often dreaded hysteresis, the characteristic of the device structure, and the materials used therein. This hysteresis spans several orders of magnitude. The SWCNT synaptic transistor exhibits a clear spike‐time‐dependent plasticity (STDP), indicating the ability to achieve learning, following a mechanism similar to biological systems: asymmetric anti‐Hebbian learning. The very well‐defined STDP shape, together with the use of a simple pulse shape to obtain it, has not been reported previously for synaptic transistors. This represents a crucial step for further development of actual hardware implementation of artificial synapses in a more extensive, layered network. Interestingly, the time response of the device is very similar to the one of biological synapse, opening opportunities unavailable to CMOS emulations.

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Section: Resultsmentioning

confidence: 99%

Synaptic Plasticity in Semiconducting Single‐Walled Carbon Nanotubes Transistors

Talsma

Loo

Shao

et al. 2020

Advanced Intelligent Systems

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show abstract

“…For example, the non-identical pulse excitation or bipolarpulse-training methods improve the linearity and symmetry of memristor synapses, but it increases the complexity of peripheral circuits, system power consumption, and chip area. Therefore, trade-offs and co-optimization need to be made at each design level to improve the learning accuracy of ANNs (Gi et al, 2018;Fu et al, 2019). Figure 5 is a collaborative design example from bottom-level memristor devices to top-level training algorithms (Fu et al, 2019).…”

Section: Memristor-based Annsmentioning

confidence: 99%

“…Therefore, trade-offs and co-optimization need to be made at each design level to improve the learning accuracy of ANNs (Gi et al, 2018;Fu et al, 2019). Figure 5 is a collaborative design example from bottom-level memristor devices to top-level training algorithms (Fu et al, 2019). The conductance response (CR) curve of memristors is first measured to obtain its non-linearity factor.…”

Section: Memristor-based Annsmentioning

confidence: 99%

Advances in Memristor-Based Neural Networks

Wang

Yan

2021

Front. Nanotechnol.

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The rapid development of artificial intelligence (AI), big data analytics, cloud computing, and Internet of Things applications expect the emerging memristor devices and their hardware systems to solve massive data calculation with low power consumption and small chip area. This paper provides an overview of memristor device characteristics, models, synapse circuits, and neural network applications, especially for artificial neural networks and spiking neural networks. It also provides research summaries, comparisons, limitations, challenges, and future work opportunities.

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“…Since the amount of charge stored in the Si 3 N 4 layer is determined by the total time the FN tunneling current flows (Kim et al, 2010), the conductance can be changed continuously with the time of the program or erase pulses applied to the devices. The normalized conductance response of the GSD is fitted by the model of conductance with respect to the total time a pulse is applied to a synaptic device (Querlioz et al, 2011;Ernoult et al, 2019;Kwon et al, 2019), as follows:…”

Section: Gated Schottky Diodementioning

confidence: 99%

On-Chip Training Spiking Neural Networks Using Approximated Backpropagation With Analog Synaptic Devices

et al. 2020

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Hardware-based spiking neural networks (SNNs) inspired by a biological nervous system are regarded as an innovative computing system with very low power consumption and massively parallel operation. To train SNNs with supervision, we propose an efficient on-chip training scheme approximating backpropagation algorithm suitable for hardware implementation. We show that the accuracy of the proposed scheme for SNNs is close to that of conventional artificial neural networks (ANNs) by using the stochastic characteristics of neurons. In a hardware configuration, gated Schottky diodes (GSDs) are used as synaptic devices, which have a saturated current with respect to the input voltage. We design the SNN system by using the proposed on-chip training scheme with the GSDs, which can update their conductance in parallel to speed up the overall system. The performance of the on-chip training SNN system is validated through MNIST data set classification based on network size and total time step. The SNN systems achieve accuracy of 97.83% with 1 hidden layer and 98.44% with 4 hidden layers in fully connected neural networks. We then evaluate the effect of non-linearity and asymmetry of conductance response for long-term potentiation (LTP) and long-term depression (LTD) on the performance of the on-chip training SNN system. In addition, the impact of device variations on the performance of the on-chip training SNN system is evaluated.

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Mitigating Nonlinear Effect of Memristive Synaptic Device for Neuromorphic Computing

Cited by 34 publications

References 30 publications

Synaptic Plasticity in Semiconducting Single‐Walled Carbon Nanotubes Transistors

Synaptic Plasticity in Semiconducting Single‐Walled Carbon Nanotubes Transistors

Advances in Memristor-Based Neural Networks

On-Chip Training Spiking Neural Networks Using Approximated Backpropagation With Analog Synaptic Devices

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