Mixed mode simulation of SRAM FinFETS

Abstract

The MG FinFETs are designed and its results are compared with the polysiliconFinFETs. The 6T SRAM cell is designed using both gate materials and their variations will be analysed.The 20nm tied gate device is compared with independent gate. The SRAM cell stability enhancement is improved using the IDG-FinFETs by controlling the individual Vth for the PG and the flipflop of the SRAM cell. By theVth-controllability of the independent-double-gate (JDG) FinFETs the variation problems in SRAMperformance is reduced.