Model-Based Design of Flexible and Efficient LDPC Decoders on FPGA Devices

Delomier, Yann; Gal, Bertrand Le; Crenne, Jérémie; Jégo, Christophe

doi:10.1007/s11265-020-01519-0

Cited by 8 publications

(8 citation statements)

References 37 publications

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“…Furthermore, [16], [48], [49] explore and review and provide Techniques for the encoding and decoding of channel codes, such as CC-LDPC, Semi-LDPC-CC, BC-LDPC, and polar code. Others investigate LDPC in varied fields and new designs to improve them, such as in [6], Using the HLS-based technique, proposed a general SystemC behavioral model that can be used to construct hardware efficient LDPC decoders with Xilinx Vivado HLS. This principle is focused on the vectorization paradigm of single instruction multiple data (SIMD).…”

Section: Related Workmentioning

confidence: 99%

A Review of Modern and Recent Studies on the Low-Density Parity-Check Technology Approach

2023

IJCCCE

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Data theory coding is an excellent and well-known branch of study that has produced various crucial solutions to the insoluble challenges of safe data transfers. Last improvements in detecting error techniques have resulted in a significant increase in the use of low-density parity-check (LDPC) code to address critical concerns connected to secure data transfer. Until now, decent efforts have been performed on LDPC codes that target low complexity, high performance, and low bit error rate goals. The final aim of this review is to provide a recent literature understanding of modern improvements previously mentioned and in LDPC encoding and decoding (applicative and theoretical) techniques. A comparative scan of many remarkable LDPC decoding algorithms, 5G standard requirements, popular power management methods, and low-energy LDPC design studies is also shown. Lastly, conclusions are presented by outlining key study results, current concerns, and general thoughts on new research directions possibilities. Index Terms— low-density parity-check encoder/decoder (LDPC), error correction codes (ECC), forward error correction codes (FEC), parity check matrix(PCM).

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Section: Related Workmentioning

confidence: 99%

A Review of Modern and Recent Studies on the Low-Density Parity-Check Technology Approach

2023

IJCCCE

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“…The suggested method evaluates every bit is true error term, node information verification, and fundamental data information using two variety of information transfer mechanisms. The SBF decoder [13], [14], the weighted bit flipping (WBF) decoder, belief propagation decoding (BPD) decoder, sequential peeling decoder (SPD), and parallel peeling decoder (PPD) techniques were used to investigate the potential causes of problems when transferring a message among a transmitter and the receiver. The Figure 2 depicts the general building blocks of the decryption process.…”

Section: Creation Of Patterned Parity Check Matrixmentioning

confidence: 99%

A hybrid soft bit flipping decoder algorithm for effective signal transmission and reception

Hussain

Babu²,

Hasan

et al. 2022

TELKOMNIKA

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The Euclidean geometry (EG) based low-density parity check (LDPC) codes are enciphered and deciphered in various modes. These algorithms have the back-and-forth between decoding delay, and power usage, device unpredictability resources, and error rate efficacy are all available with these methods. As a result, the goal of this paper is to develop a comprehensive method to describe both soft and burst error bits for optimal data transfer. As a result, for EG-LDPC codes, a hybrid soft bit flipping (HSBF) decoder is suggested, which decreases decoding complications while improving message data transfer. A simulation model is formed using Xilinx synthesis report to study decoding latency, hardware usage, and power usage. A HSBF decoder is used in this paper, which accepts a 64-bit coding sequence and assigns 64 Adjustable nodes to it. It checks all customizable cluster connections and quantifies adjustable node values and actions. As a consequence of the data collected, our simulation model demonstrates that the HSBF technique outperforms soft bit flipping (SBF) algorithms. As a result, the techniques are ideal for usage in intermediate applications and as well as in cyber security processing technologies, medical applications.

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“…Delomier [16] presented an effective Low-Density-Parity-Check (LDPC) code by considering the behavioral models. Here, two different types of LDPC model were created for describing the inherent computational parallelism.…”

Section: Related Workmentioning

confidence: 99%

“…The latency of the LDPC code is not minimized with the higher operating frequency, which shows the delay of the coding scheme is high while correcting the codes [16]. The MIMO-OFDM system with huge amount of logical elements increases the area occupied by the communication model [17].…”

Section: Problem Statementmentioning

confidence: 99%

Low area FPGA Implementation of Secure MIMO OFDM based Wireless ECG Signal Transmission

Basavaraj¹,

Sujatha²

2021

IJIES

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Multiple-Input Multiple-Output Orthogonal Frequency Division Multiplexing (MIMO-OFDM) is widely used to provide high speed data transmission and spectrum efficiency in modern wireless communication systems. Specifically, the transmission of Electrocardiogram (ECG) signal plays a main role in health monitoring systems. The privacy and security of the patient identification and medical records are considered as a main concern in health monitoring systems. In this paper, the Lightweight cryptography (LWC) is proposed to secure the ECG signal transmission from unauthorized users through the MIMO-OFDM system. The LWC is mainly used to minimize the amount of logical elements using the gate level architecture and simple key schedule in the MIMO-OFDM. The turbo code is used in MIMO-OFDM is due to its error correcting capacity that minimizes the amount of error caused during communication under the constraints of burst error and Inter Symbol Interference (ISI). Here, the ECG signals from the MIT arrhythmia database is used to analyse the secure ECG signal transmission of LWC-MIMO-OFDM method. The performance of the proposed LWC-MIMO-OFDM is taken by means of area, delay, power, number of slices, flipflops and LUTs. The LWC-MIMO-OFDM method is compared with Advanced Encryption Standard (AES) to evaluate the efficiency of LWC-MIMO-OFDM. The delay of the LWC-MIMO-OFDM for Virtex 5 device is 13.3ns, it is less when compared to the delay caused by the AES.

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Model-Based Design of Flexible and Efficient LDPC Decoders on FPGA Devices

Cited by 8 publications

References 37 publications

A Review of Modern and Recent Studies on the Low-Density Parity-Check Technology Approach

A Review of Modern and Recent Studies on the Low-Density Parity-Check Technology Approach

A hybrid soft bit flipping decoder algorithm for effective signal transmission and reception

Low area FPGA Implementation of Secure MIMO OFDM based Wireless ECG Signal Transmission

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