Model for a 15ns 16K RAM with Josephson junctions

Broom, R. F.; Guéret, P.; Kotyczka, W.; Mohr, Th.; Möser, Andreas; Oosenbrug, A.; Wolf, Peter

doi:10.1109/isscc.1978.1155788

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Single Josephson Junction1

Introduction Everal Types Of Josephson Memory Cell Have Been1

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1978

1988

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Cited by 5 publications

(2 citation statements)

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“…12, have been developed to represent the information by the absence or presence of a single flux quantum. A memory chip prototype with 2024 interferometer cells comprising integrated address decoder and read out circuits has been implemented and successfully tested [27], L28]. The cell area is 1500 pm2 Basea on tne aata or tne prototype a 16 KBit memory chip is designed with an access time of 15 ns and an active power dissipation of 40 ,UW at maximum repetition rate.…”

Section: Single Josephson Junctionmentioning

confidence: 99%

High Speed Low Power Circuits with Josephson Junctions

Jutzi¹

1981

11th European Microwave Conference, 1981

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Section: Single Josephson Junctionmentioning

confidence: 99%

High Speed Low Power Circuits with Josephson Junctions

Jutzi¹

1981

11th European Microwave Conference, 1981

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“…It uses only a two-junction SQUID, and occupies a small area. However, it needs a current flip-flop in its drive and sense circuits [5], so its operating speed will normally be slower than that of the two-gate type.…”

Section: Introduction Everal Types Of Josephson Memory Cell Have Beenmentioning

confidence: 99%

A capacitively coupled SFQ Josephson memory cell

Suzuki

Hasuo

1988

IEEE Trans. Electron Devices

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This paper presents the design and experimental results of a new type of Josephson memory cell. It has a simpler construction than the conventional Henkels-type memory cell, using a one-junction SQUID capacitively coupled to a single junction. Binary data are stored as a single flux quantum in the one-junction SQUID, and are destructively read out by sensing a pulse caused by a vortex-mode transition. Computer simulations suggested that the READ operation could be performed with a bias margin for the sense junction of *28 percent, and also that the rise time of the sense current in a 16-bit memory cell would be as fast as 30 ps despite having to sense a vortex-mode transition. We provide results of a memory cell fabricated with Nb/AIO,/Nb junctions. '

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Low temperature superconducting electronic and computer circuits

Wolf

1978

Cryogenics

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Model for a 15ns 16K RAM with Josephson junctions

Cited by 5 publications

References 1 publication

High Speed Low Power Circuits with Josephson Junctions

High Speed Low Power Circuits with Josephson Junctions

A capacitively coupled SFQ Josephson memory cell

Low temperature superconducting electronic and computer circuits

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