This paper proposes a small-signal modeling in synchronous reference frame for hierarchical control structures applied to the parallelism of three-phase UPS where all the control loops are included. It considers the inner current and voltage loops, virtual impedance, droop control and secondary control loops for amplitude and frequency restorations, as well as for active and reactive power equalizations. The presented modeling is developed in the state-space and consists of the linearization around an equilibrium point. The obtained models are validated through simulation results, which correspond precisely to the average values of the analyzed waveforms. Hardware-in-the-loop results confirm the functionality of the proposed modeling in the definition of the hierarchical control structure controllers gains, as well as its performance.