Modeling and Dimensioning of a Planar Inductor for a Monolithic Integration

The Performance of an Integrated Transformer in a DC/DC Converter

“…Therefore, information to optimize high performance on-chip transformer with desired inductance, quality factor and coupling coefficient K is very significant. In the past a few decades, great labors have been loyal to the modeling, optimization and design of the on-chip transformer on silicon substrates [11][12][13]. The approaches, such as using diverse structures planar type or stack type [14], and diverse geometry octagonal type or square type [15], and patterned ground shields between metal conductors and the silicon substrate [16,17], have been reported.…”