Modeling and Mitigating the Interconnect Resistance Issue in Analog RRAM Matrix Computing Circuits

Luo, Yubiao; Wang, Shi‐Qing; Zuo, Pushen; Sun, Zhong; Huang, Ru

doi:10.1109/tcsi.2022.3199453

Cited by 13 publications

(1 citation statement)

References 55 publications

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“…Similarly, the method can be used to compute eigenvalues, pseudo-inverses, etc. Previous work [95] has solved the inversion of a 32×32 matrix in 0.55 µs. However, it requires careful hardware tuning to achieve high accuracy and has a high demand on the current-voltage characteristic of device.…”

Section: B Scientific Computingmentioning

confidence: 99%

A Survey of Computing-in-Memory Processor: From Circuit to Application

Sun,

Yue,

et al. 2024

IEEE Open J. Solid-State Circuits Soc.

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The computing-in-memory (CIM) technique is emerging with the evolvement of big data and artificial intelligence (AI) application. The manuscript presents a systematic review of existing CIM works in a bottom-up view from circuit to application. Various types of CIM circuits based on different volatile/non-volatile devices are introduced. The micro CIM architectures are illustrated to support multibit precision computation. After that, several types of processor-level CIM chips are analyzed to reveal the system architecture design considerations. The corresponding CIM tool chains and applications beyond AI applications are also introduced. From circuit to application levels, this manuscript analyzes the design trade-offs, remained challenges and possible future design trends at different design hierarchies of CIM processors.INDEX TERMS Computing-in-memory (CIM), CIM processor, Circuit-level CIM cells, CIM micro architecture, CIM tool chains, CIM applications

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Section: B Scientific Computingmentioning

confidence: 99%

A Survey of Computing-in-Memory Processor: From Circuit to Application

Sun,

Yue,

et al. 2024

IEEE Open J. Solid-State Circuits Soc.

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Capacitance and Conductance Compensation Methods for Efficient Computing‐In‐Memory Designs

Luo,

Qiao,

Sun

2024

Adv Elect Materials

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Compensation has been a common while unacknowledged strategy in the design of computing‐in‐memory (CIM) schemes. It enables efficient CIM designs by intentionally letting the sum of capacitances or conductances of two or more rows or columns in the memory array equal, thus resulting in a concise mathematical formula regarding the memory cell data and the input data, which constitute computing primitives. Here, the capacitance and conductance compensation methods are reviewed that have been used for CIM designs based on static random‐access memory (SRAM) in combination with capacitors and nonvolatile resistive memory, respectively, and uncover the underlying principles and their application to CIM. It is hoped this effort will help recognize the compensation methods as a building block for CIM designs, and will be an inspiration to developing more CIM schemes that are more compact in area, more efficient in energy consumption, and capable of solving more complicated problems.

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